MC9S12XD256VAG Freescale Semiconductor, MC9S12XD256VAG Datasheet - Page 629

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MC9S12XD256VAG

Manufacturer Part Number
MC9S12XD256VAG
Description
IC MCU 256K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XD256VAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
14K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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17.3.2.10 RAM XGATE Upper Boundary Register (RAMXGU)
Read: Anytime
Write: Anytime when RWPE = 0
17.3.2.11 RAM Shared Region Lower Boundary Register (RAMSHL)
Read: Anytime
Write: Anytime when RWPE = 0
Freescale Semiconductor
Address: 0x011D
Address: 0x011E
XGU[6:0]
SHL[6:0]
Reset
Reset
Field
Field
6–0
6–0
W
W
R
R
XGATE Region Upper Boundary Bits 6-0 — These bits define the upper boundary of the RAM region allocated
to the XGATE module in multiples of 256 bytes. The 256 byte block selected by this register is included in the
region. See
RAM Shared Region Lower Boundary Bits 6–0 — These bits define the lower boundary of the shared memory
region in multiples of 256 bytes. The block selected by this register is included in the region. See
details.
1
1
1
1
7
7
Figure 17-19. RAM Shared Region Lower Boundary Register (RAMSHL)
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 17-18. RAM XGATE Upper Boundary Register (RAMXGU)
Figure 1-25
XGU6
SHL6
1
1
6
6
Table 17-15. RAMXGU Field Descriptions
Table 17-16. RAMSHL Field Descriptions
for details.
MC9S12XDP512 Data Sheet, Rev. 2.21
XGU5
SHL5
1
1
5
5
XGU4
SHL4
1
1
4
4
Description
Description
XGU3
SHL3
1
1
3
3
Chapter 17 Memory Mapping Control (S12XMMCV2)
XGU2
SHL2
1
1
2
2
XGU1
SHL1
1
1
1
1
Figure 1-25
XGU0
SHL0
1
1
0
0
for
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