R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1106

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 22 AND/NAND Flash Memory Controller (FLCTL)
Rev. 3.00 Sep. 28, 2009 Page 1074 of 1650
REJ09B0313-0300
Bit
9
8
7
Bit Name
ECERB
STERB
BTOERB
Initial
Value
0
0
0
R/W
R/(W)* ECC Error
R/(W)* Status Error
R/(W)* R/B Timeout Error
Description
Indicates the result of ECC error detection. This bit is
set to 1 if an ECC error occurs while flash memory is
read in sector access mode.
This bit is a flag. 1 cannot be written to this bit. Only 0
can be written to clear the flag.
0: Indicates that no ECC error occurs (Latched ECC is
1: Indicates that an ECC error occurs
Indicates the result of status read. This bit is set to 1 if
the specific bit in the bits STAT[7:0] in FLBSYCNT is
set to 1 in status read.
This bit is a flag. 1 cannot be written to this bit. Only 0
can be written to clear the flag.
0: Indicates that no status error occurs (the specific bit
1: Indicates that a status error occurs
For details on the specific bit in STAT7 to STAT0 bits,
see section 22.4.7, Status Read.
This bit is set to 1 if an R/B timeout error occurs (the
bits RBTIMCNT[19:0] in FLBSYCNT are decremented
to 0).
This bit is a flag. 1 cannot be written to this bit. Only 0
can be written to clear the flag.
0: Indicates that no R/B timeout error occurs
1: Indicates that an R/B timeout error occurs
all 0.)
in the bits STAT[7:0] in FLBSYCNT is 0.)