R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1144
R5S72030W200FP
Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Specifications of R5S72030W200FP
Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Section 23 USB 2.0 Host/Function Module (USB)
Note:
Rev. 3.00 Sep. 28, 2009 Page 1112 of 1650
REJ09B0313-0300
Bit
3 to 0
* For details, see section 23.5.2, Procedure for Setting the USB Transceiver.
Bit Name
UTST[3:0]
Initial
Value
0000
R/W
R/W
Description
Test Mode
Table 23.4 shows test mode operation of this
module. These bits control the USB test signal output
in high-speed mode.
[When the host controller function is selected]
When the host controller function is selected, these
bits may be set after writing 1 to DCFM and DRPD.
Writing to these bits terminates high-speed
operation.
Use the following procedure to set these bits:
(1) Perform a power-on reset.
(2) Set DCFM and DPRD to 1. (It is not necessary to
(3) Set USBE to 1.
(4) Set the value of these bits according to the test
Use the following procedure to change the values of
these bits:
(1) (In the state following step (4) above) clear USBE
(2) Set USBE to 1.
(3) Set the value of these bits according to the test
Note: When the Test_SE0_NAK (1011) setting is
[When the function controller function is selected]
When the function controller function is selected,
write to these bits according to SetFeature requests
from the USB host during high-speed operation.
Note: The module will not transition to the suspend
set HSE to 1.)
details.
to 0.
details.
selected, the module does not output SOF
packets even when UACT is set to 1. When
the Test_Force_Enable (1101) setting is
selected and UACT is set to 1, the module
outputs SOF packets.
When setting the UTST bits, set the PID bits
for all the pipes to NAK. To return to normal
USB communication after test mode setting,
perform a power-on reset.
state while the setting of these bits is any
value from 0001 to 0100.
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