R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1196

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 23 USB 2.0 Host/Function Module (USB)
23.3.34 Pipe Maximum Packet Size Register (PIPEMAXP)
PIPEMAXP is a register that specifies the maximum packet size for PIPE1 to PIPE7.
This register is initialized by a power-on reset or a software reset.
Initial value:
Note:
Rev. 3.00 Sep. 28, 2009 Page 1164 of 1650
REJ09B0313-0300
Bit
15, 14
13 to 11 ⎯
10 to 0
R/W:
Bit:
* The initial value of MXPS is H'000 when no pipe is selected with the PIPESEL bits in
DEVSEL[1:0]
R/W
Bit Name
DEVSEL[1:0]
MXPS[10:0]
15
0
PIPESEL and H'040 when a pipe is selected with the PIPESEL bit in PIPESEL.
R/W
14
0
13
R
0
-
12
Initial
Value
00
All 0
*
R
0
-
11
R
0
-
R/W
R/W
R
R/W
R/W
10
*
R/W
9
*
Description
Device Select
When the host controller function is selected, these
bits specify the peripheral device address. When the
function controller function is selected, this bit should
be set to B'00.
00: Address 00
01: Address 01
10: Address 10
11: Address 11
Reserved
These bits are always read as 0. The write value
should always be 0.
Maximum Packet Size
These bits specify the maximum packet size for the
corresponding pipe.
These bits should be set to a value defined by the
USB specification for each transfer type.
R/W
8
*
R/W
7
*
R/W
6
*
MXPS[10:0]
R/W
5
*
R/W
4
*
R/W
3
*
R/W
2
*
R/W
1
*
R/W
0
*