R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1285

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

24.3.12 LCDC Vertical Display Line Number Register (LDVDLNR)
LDVDLNR specifies the LCD module's vertical size (for both scan direction and vertical
direction). For a DSTN panel, specify an even number at least as large as the LCD panel's vertical
size regardless of the size of the upper and lower panels, e.g. 480 for a 640
Initial value:
Bit
15 to 11
10
9
8
7
6
5
4
3
2
1
0
R/W:
Bit:
15
R
0
-
Bit Name
⎯
VDLN10
VDLN9
VDLN8
VDLN7
VDLN6
VDLN5
VDLN4
VDLN3
VDLN2
VDLN1
VDLN0
14
R
0
-
13
R
0
-
Initial
Value
All 0
0
0
1
1
1
0
1
1
1
1
1
12
R
0
-
11
R
0
-
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
VDLN10 VDLN9 VDLN8 VDLN7 VDLN6 VDLN5 VDLN4 VDLN3 VDLN2 VDLN1 VDLN0
R/W
10
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Vertical Display Line Number
Set the number of vertical display lines (unit: line).
Specify to the value of (the number of display line) -1.
Example: For an 480-line LCD module
R/W
9
0
R/W
8
1
VDLN = 480-1 = 479 = H'1DF
R/W
7
1
Rev. 3.00 Sep. 28, 2009 Page 1253 of 1650
R/W
6
1
R/W
Section 24 LCD Controller (LCDC)
5
0
R/W
4
1
x
480 panel.
R/W
3
1
REJ09B0313-0300
R/W
2
1
R/W
1
1
R/W
0
1