R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1339

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

25.1
• By setting the control registers, multiplexed pin functions can be selectable.
• When the general I/O function or TIOC I/O function of MTU2 is specified, the I/O direction
• Switching the port A function by the settings of the A/D control/status register of the A/D
Setting
Register
PFCRL3
PFCRL2
PFCRL1
can be selected by I/O register settings.
converter (ADCSR) or D/A control register of the D/A converter (DACR).
00
Function 1
(Related Module)
PF11 I/O (port)
PF10 I/O (port)
PF9 I/O (port)
PF8 I/O (port)
PF7 I/O (port)
PF6 I/O (port)
PF5 I/O (port)
PF4 I/O (port)
PF3 I/O (port)
PF2 I/O (port)
PF1 I/O (port)
PF0 I/O (port)
Features
01
Function 2
(Related Module)
NAF3 I/O (FLCTL)
NAF2 I/O (FLCTL)
NAF1 I/O (FLCTL)
NAF0 I/O (FLCTL)
FSC output (FLCTL)
FOE output (FLCTL)
FCDE output (FLCTL)
FWE output (FLCTL)
TCLKD input (MTU2)
TCLKC input (MTU2)
TCLKB input (MTU2)
TCLKA input (MTU2)
Setting of Mode Bits (PFnMD[1:0])
10
Function 3
(Related Module)
LCD_DATA11 output
(LCDC)
LCD_DATA10 output
(LCDC)
LCD_DATA9 output
(LCDC)
LCD_DATA8 output
(LCDC)
LCD_DATA7 output
(LCDC)
LCD_DATA6 output
(LCDC)
LCD_DATA5 output
(LCDC)
LCD_DATA4 output
(LCDC)
LCD_DATA3 output
(LCDC)
LCD_DATA2 output
(LCDC)
LCD_DATA1 output
(LCDC)
LCD_DATA0 output
(LCDC)
Rev. 3.00 Sep. 28, 2009 Page 1307 of 1650
Section 25 Pin Function Controller (PFC)
11
Function 4
(Related Module)
⎯
⎯
⎯
⎯
SCS1 I/O (SSU)
SSO1 I/O (SSU)
SSI1 I/O (SSU)
SSCK1 I/O (SSU)
SCS0 I/O (SSU)
SSO0 I/O (SSU)
SSI0 I/O (SSU)
SSCK0 I/O (SSU)
REJ09B0313-0300