R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1360

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Section 25 Pin Function Controller (PFC)
Rev. 3.00 Sep. 28, 2009 Page 1328 of 1650
REJ09B0313-0300
Bit
6 to 4
3
Bit Name
PD9MD[2:0]
Initial
Value
000/001* R/W
0
R/W
R
Description
PD9 Mode
Select the function of the
PD9/D25/PINT1/DACK0/TIOC3B pin.
Reserved
This bit is always read as 0. The write value should
always be 0.
Area 0: 32-bit mode
000: Setting prohibited
001: D25 I/O (data) (initial value)
010: Setting prohibited
011: Setting prohibited
100: Setting prohibited
101: Setting prohibited
110: Setting prohibited
111: Setting prohibited
Area 0: 16-bit mode
000: PD9 I/O (port) (initial value)
001: D25 I/O (data)
010: PINT1 input (INTC)
011: Setting prohibited
100: DACK0 output (DMAC)
101: TIOC3B I/O (MTU2)
110: Setting prohibited
111: Setting prohibited

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