R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1362

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 25 Pin Function Controller (PFC)
(3)
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 1330 of 1650
REJ09B0313-0300
Bit
15
14 to 12 PD7MD[2:0]
11
R/W:
Port D Control Register L2 (PDCRL2)
Bit:
Note:
Bit Name
⎯
⎯
15
R
0
-
*
Depends on the operating mode of the LSI.
R/W
14
0
PD7MD[2:0]
R/W
13
0
Initial
Value
0
000/001* R/W
0
R/W
0/1*
12
11
R
0
-
R/W
R
R
R/W
10
0
PD6MD[2:0]
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
PD7 Mode
Select the function of the
PD7/D23/IRQ7/SCS1/TCLKD/TIOC2B pin.
•
•
Reserved
This bit is always read as 0. The write value should
always be 0.
R/W
9
0
Area 0: 32-bit mode
000: Setting prohibited
001: D23 I/O (data) (initial value)
010: Setting prohibited
011: Setting prohibited
100: Setting prohibited
101: Setting prohibited
110: Setting prohibited
111: Setting prohibited
Area 0: 16-bit mode
000: PD7 I/O (port) (initial value)
001: D23 I/O (data)
010: IRQ7 input (INTC)
011: SCS1 I/O (SSU)
100: TCLKD input (MTU2)
101: TIOC2B I/O (MTU2)
110: Setting prohibited
111: Setting prohibited
R/W
0/1*
8
R
7
0
-
R/W
6
0
PD5MD[2:0]
R/W
5
0
0/1*
R/W
4
R
3
0
-
R/W
2
0
PD4MD[2:0]
R/W
1
0
0/1*
R/W
0