R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1377

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

25.2.9
PFIORH and PFIORL are 16-bit readable/writable registers that are used to set the pins on port F
as inputs or outputs. The PF30IOR to PF0IOR bits correspond to the PF30/AUDIO_CLK to
PF0/TCLKA/LCD_DATA0/SSCK0 pins, respectively. PFIORH and PFIORL are enabled when
the port F pins are functioning as general-purpose inputs/outputs (PF30 to PF0). In other states,
they are disabled. If a bit in PFIORH/PFIORL is set to 1, the corresponding pin on port F
functions as an output. If it is cleared to 0, the corresponding pin functions as an input.
Bit 15 of PFIORH is reserved. This bit is always read as 0. The write value should always be 0.
(1)
Initial value:
Bit
3
2 to 0
R/W:
Port F I/O Register H
Bit:
Port F I/O Registers H, L (PFIORH, PFIORL)
Bit Name
⎯
PE0MD[2:0] 000
15
R
0
-
PF30
R/W
IOR
14
0
PF29
R/W
IOR
13
0
Initial
Value
0
PF28
R/W
IOR
12
0
R/W
PF27
IOR
11
0
R/W
R
R/W
PF26
R/W
IOR
10
0
R/W
PF25
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
PE0 Mode
Select the function of the PE0/BS/RxD0/ADTRG pin.
000: PE0 I/O (port)
001: BS output (BSC)
010: Setting prohibited
011: RxD0 input (SCIF)
100: ADTRG input (ADC)
101: Setting prohibited
110: Setting prohibited
111: Setting prohibited
IOR
9
0
PF24
R/W
IOR
8
0
R/W
PF23
IOR
7
0
Rev. 3.00 Sep. 28, 2009 Page 1345 of 1650
PF22
R/W
IOR
Section 25 Pin Function Controller (PFC)
6
0
R/W
PF21
IOR
5
0
R/W
PF20
IOR
4
0
PF19
R/W
IOR
3
0
REJ09B0313-0300
R/W
PF18
IOR
2
0
PF17
R/W
IOR
1
0
PF16
R/W
IOR
0
0