R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1440

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Section 28 Power-Down Modes
Rev. 3.00 Sep. 28, 2009 Page 1408 of 1650
REJ09B0313-0300
Bit
3
2
1
0
Bit Name
MSTP53
MSTP52
MSTP51
MSTP50
Initial
Value
1
1
1
1
R/W
R/W
R/W
R/W
R/W
Description
Module Stop 53
When the MSTP53 bit is set to 1, the supply of the
clock to the RCAN0 is halted.
0: RCAN0 runs.
1: Clock supply to RCAN0 is halted.
Module Stop 52
When the MSTP52 bit is set to 1, the supply of the
clock to the RCAN1 is halted.
0: RCAN1 runs.
1: Clock supply to RCAN1 is halted.
Module Stop 51
When the MSTP51 bit is set to 1, the supply of the
clock to the SSU0 is halted.
0: SSU0 runs.
1: Clock supply to SSU0 is halted.
Module Stop 50
When the MSTP50 bit is set to 1, the supply of the
clock to the SSU1 is halted.
0: SSU1 runs.
1: Clock supply to SSU1 is halted.

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