R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1657

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Item
14.4.3 Reading Time
Figure 14.3 Reading
Time
14.5.3 Transition to
Standby Mode after
Setting Register
15.3.8 Bit Rate Register
(SCBRR)
Table 15.4 Bit Rates
and SCBRR Settings
(Asynchronous Mode,
BGDM = 0, ABCS = 0) (1)
Table 15.4 Bit Rates
and SCBRR Settings
(Asynchronous Mode,
BGDM = 0, ABCS = 0) (4)
Page
716
718
746
749
Revision (See Manual for Details)
Figure amended
Description amended
In case the registers are set, be sure to make a transition to
standby mode after performing one dummy read the register.
Table amended
Table amended
Bit
Rate
(bit/s)
19200
Bit Rate
(bit/s)
4800
Yes
0
n
(b) To read the time using interrupts
N
12
n
0
8
Disable the carry interrupt
Enable the carry interrupt
Read counter register
Clear the carry flag
Clear the carry flag
Error
(%)
0.16
interrupt
N
194
0
n
No
Rev. 3.00 Sep. 28, 2009 Page 1625 of 1650
30
9.8304
N
15
Error (%)
0.16
Error
(%)
0.00
Pφ (MHz)
Pφ (MHz)
n
0
Write 0 to CF in RCR1
(Set AF in RCR1 to 1 so that alarm
Write 0 to CIE in RCR1
Write 1 to CIE in RCR1
flag is not cleared.)
n
0
N
15
10
Error
(%)
1.73
N
214
REJ09B0313-0300
0
n
33
N
19
Error (%)
−0.07
12
−2.34
Error
(%)