R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 1671

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Item
31.4.3 Bus Timing
Figure 31.15 Basic Bus
Timing for Normal Space
(One External Wait
Cycle)
Figure 31.16 Basic Bus
Timing for Normal Space
(One Software Wait
Cycle, External Wait
Cycle Valid (WM Bit = 0),
No Idle Cycle)
31.4.6 MTU2 Timing
Table 31.11 MTU2
Timing
Page
1544
1545
1576
Revision (See Manual for Details)
Figure amended
Figure amended
Table amended
Write
Output compare output delay time
Input capture input setup time
Timer input setup time
Item
Write
D15 to D0
TENDn*
DACKn
WAIT
WEn
D31 to D0
BS
TENDn*
Note: * The waveform for DACKn and TENDn is when active low is specified.
DACKn
Note: * The waveform for DACKn and TENDn is when active low is specified.
WAIT
t
t
WEn
t
BSD
DACD
WDD1
BS
t
WED1
t
WTH
Rev. 3.00 Sep. 28, 2009 Page 1639 of 1650
t
t
BSD
t
t
BSD
t
WTS
Symbol Min.
t
t
t
WDD1
DACD
TOCD
TICS
TCKS
t
WED1
t
WTH
t
t
WTS
WED1
t
DACD
t
WDH1
—
20
20
t
t
AH
WDH4
t
BSD
t
BSD
t
WTH
t
WTS
Max.
100
—
—
t
WED1
t
t
WDD1
DACD
t
WTH
Unit
ns
ns
ns
t
t
BSD
WTS
REJ09B0313-0300
t
WED1
t
WED1
Figure
Figure 31.48
Figure 31.49
t
DACD
t
WDH1
t
t
WDH4
AH
t
t
WDH4
WDH1
t
t
AH
DACD