R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 181

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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The interrupt controller (INTC) ascertains the priority of interrupt sources and controls interrupt
requests to the CPU. The INTC registers set the order of priority of each interrupt, allowing the
user to process interrupt requests according to the user-set priority.
6.1
• 16 levels of interrupt priority can be set
• NMI noise canceler function
• Occurrence of interrupt can be reported externally (IRQOUT pin)
• Register banks
By setting the fifteen interrupt priority registers, the priorities of IRQ interrupts, PINT
interrupts, and on-chip peripheral module interrupts can be selected from 16 levels for request
sources.
An NMI input-level bit indicates the NMI pin state. By reading this bit in the interrupt
exception service routine, the pin state can be checked, enabling it to be used as the noise
canceler function.
For example, when this LSI has released the bus mastership, this LSI can inform the external
bus master of occurrence of an on-chip peripheral module interrupt and request for the bus
mastership.
This LSI has register banks that enable register saving and restoration required in the interrupt
processing to be performed at high speed.
Features
Section 6 Interrupt Controller (INTC)
Rev. 3.00 Sep. 28, 2009 Page 149 of 1650
Section 6 Interrupt Controller (INTC)
REJ09B0313-0300

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