R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 323

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
10
9
8
7 to 5
Bit Name
RMODE
PDOWN
BACTV
⎯
Initial
Value
0
0
All 0
0
R/W
R/W
R/W
R/W
R
Description
Refresh Control
Specifies whether to perform auto-refresh or self-
refresh when the RFSH bit is 1. When the RFSH bit is
1 and this bit is 1, self-refresh starts immediately.
When the RFSH bit is 1 and this bit is 0, auto-refresh
starts according to the contents that are set in
registers RTCSR, RTCNT, and RTCOR.
0: Auto-refresh is performed
1: Self-refresh is performed
Power-Down Mode
Specifies whether the SDRAM will enter the power-
down mode after the access to the SDRAM. With this
bit being set to 1, after the SDRAM is accessed, the
CKE signal is driven low and the SDRAM enters the
power-down mode.
0: The SDRAM does not enter the power-down mode
1: The SDRAM enters the power-down mode after
Bank Active Mode
Specifies to access whether in auto-precharge mode
(using READA and WRITA commands) or in bank
active mode (using READ and WRIT commands).
0: Auto-precharge mode (using READA and WRITA
1: Bank active mode (using READ and WRIT
Note: Bank active mode can be used only when
Reserved
These bits are always read as 0. The write value
should always be 0.
after being accessed.
being accessed.
commands)
commands)
either the upper or lower bits of the CS3 space
are used. When both the CS2 and CS3 spaces
are set to SDRAM, specify the auto-precharge
mode.
Rev. 3.00 Sep. 28, 2009 Page 291 of 1650
Section 9 Bus State Controller (BSC)
REJ09B0313-0300