R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 324

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 9 Bus State Controller (BSC)
Rev. 3.00 Sep. 28, 2009 Page 292 of 1650
REJ09B0313-0300
Bit
4, 3
2
1, 0
Bit Name
A3ROW[1:0] 00
⎯
A3COL[1:0]
Initial
Value
0
00
R/W
R/W
R
R/W
Description
Number of Bits of Row Address for Area 3
Specify the number of bits of the row address for
area 3.
00: 11 bits
01: 12 bits
10: 13 bits
11: Reserved (setting prohibited)
Reserved
This bit is always read as 0. The write value should
always be 0.
Number of Bits of Column Address for Area 3
Specify the number of bits of the column address for
area 3.
00: 8 bits
01: 9 bits
10: 10 bits
11: Reserved (setting prohibited)