R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 439

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
15, 14
13, 12
Bit Name
DM[1:0]
SM[1:0]
Initial
Value
00
00
R/W
R/W
R/W
Description
Destination Address Mode
These bits select whether the DMA destination
address is incremented, decremented, or left fixed. (In
single address mode, DM1 and DM0 bits are ignored
when data is transferred to an external device with
DACK.)
00: Fixed destination address
01: Destination address is incremented (+1 in 8-bit
10: Destination address is decremented (–1 in 8-bit
11: Setting prohibited
Source Address Mode
These bits select whether the DMA source address is
incremented, decremented, or left fixed. (In single
address mode, SM1 and SM0 bits are ignored when
data is transferred from an external device with
DACK.)
00: Fixed source address
01: Source address is incremented (+1 in byte-unit
10: Source address is decremented (–1 in byte-unit
11: Setting prohibited
transfer, +2 in 16-bit transfer, +4 in 32-bit transfer,
+16 in 16-byte transfer)
transfer, –2 in 16-bit transfer, –4 in 32-bit transfer,
setting prohibited in 16-byte transfer)
transfer, +2 in word-unit transfer, +4 in longword-
unit transfer, +16 in 16-byte-unit transfer)
transfer, –2 in word-unit transfer, –4 in longword-
unit transfer, setting prohibited in 16-byte-unit
transfer)
Section 10 Direct Memory Access Controller (DMAC)
Rev. 3.00 Sep. 28, 2009 Page 407 of 1650
REJ09B0313-0300