R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 586

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
(2)
Figure 11.36 shows an example of operation in the reset-synchronized PWM mode. TCNT_3 and
TCNT_4 operate as upcounters. The counter is cleared when a TCNT_3 and TGRA_3 compare-
match occurs, and then begins incrementing from H'0000. The PWM output pin output toggles
with each occurrence of a TGRB_3, TGRA_4, TGRB_4 compare-match, and upon counter clears.
Rev. 3.00 Sep. 28, 2009 Page 554 of 1650
REJ09B0313-0300
Reset-Synchronized PWM Mode Operation
TCNT_3 and TCNT_4
TGRA_3
TGRB_3
TGRA_4
TGRB_4
TIOC3B
TIOC3D
TIOC4A
TIOC4C
TIOC4B
TIOC4D
H'0000
Figure 11.36 Reset-Synchronized PWM Mode Operation Example
values
(When TOCR’s OLSN = 1 and OLSP = 1)
Time

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