R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 721
R5S72030W200FP
Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Specifications of R5S72030W200FP
Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
R5S72030W200FP
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SAMSUNG
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13.5.4
If the WDTOVF signal is input to the RES pin of this LSI, this LSI cannot be initialized correctly.
Avoid input of the WDTOVF signal to the RES pin of this LSI through glue logic circuits. To
reset the entire system with the WDTOVF signal, use the circuit shown in figure 13.6.
13.5.5
When a manual reset occurs in watchdog timer mode, the bus cycle is continued. If a manual reset
occurs while the bus is released or during DMAC burst transfer, manual reset exception handling
will be pended until the CPU acquires the bus mastership.
System Reset by WDTOVF Signal
Manual Reset in Watchdog Timer Mode
Figure 13.6 Example of System Reset Circuit Using WDTOVF Signal
Reset signal to
entire system
(Low active)
(Low active)
Reset input
Rev. 3.00 Sep. 28, 2009 Page 689 of 1650
Section 13 Watchdog Timer (WDT)
WDTOVF
RES
REJ09B0313-0300
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