R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 738
R5S72030W200FP
Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Specifications of R5S72030W200FP
Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
R5S72030W200FP
Manufacturer:
SAMSUNG
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Section 14 Realtime Clock (RTC)
14.3.12 Day of Week Alarm Register (RWKAR)
RWKAR is an alarm register corresponding to the BCD coded day of week counter RWKCNT.
When the ENB bit is set to 1, a comparison with the RWKCNT value is performed. From among
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR/RCR3, the counter and alarm
register comparison is performed only on those with ENB bits set to 1, and if each of those
coincides, an alarm flag of RCR1 is set to 1.
The assignable range is from 0 through 6 + ENB bits (practically in BCD), otherwise operation
errors occur.
Rev. 3.00 Sep. 28, 2009 Page 706 of 1650
REJ09B0313-0300
Bit
7
6 to 3
2 to 0
Bit Name
ENB
⎯
Day
Initial value:
Initial
Value
0
All 0
Undefined R/W
R/W:
BIt:
ENB
R/W
7
0
R/W
R/W
R
R
6
0
-
Description
When this bit is set to 1, a comparison with the
Reserved
These bits are always read as 0. The write value should
always be 0.
Day of Week Setting Value
000: Sunday
001: Monday
010: Tuesday
011: Wednesday
100: Thursday
101: Friday
110: Saturday
111: Reserved (setting prohibited)
RWKCNT value is performed.
R
5
0
-
R
4
0
-
R
3
0
-
R/W
2
-
R/W
Day
1
-
R/W
0
-
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