R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 776
R5S72030W200FP
Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Specifications of R5S72030W200FP
Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Section 15 Serial Communication Interface with FIFO (SCIF)
15.3.8
SCBRR is an 8-bit register that is used with the CKS1 and CKS0 bits in the serial mode register
(SCSMR) and the BGDM and ABCS bits in the serial extension mode register (SCEMR) to
determine the serial transmit/receive bit rate.
The CPU can always read and write to SCBRR. SCBRR is initialized to H'FF by a power-on reset.
Each channel has independent baud rate generator control, so different values can be set in three
channels.
The SCBRR setting is calculated as follows:
• Asynchronous mode:
Rev. 3.00 Sep. 28, 2009 Page 744 of 1650
REJ09B0313-0300
When baud rate generator operates in normal mode (when the BGDM bit of SCEMR is 0):
When baud rate generator operates in double speed mode (when the BGDM bit of
SCEMR is 1):
Bit Rate Register (SCBRR)
N =
N =
N =
N =
64 × 2
32 × 2
32 × 2
16 × 2
Pφ
Pφ
Pφ
Pφ
Initial value:
2n-1
2n-1
2n-1
2n-1
× B
× B
× B
× B
R/W:
Bit:
× 10
× 10
× 10
× 10
R/W
7
1
6
6
6
6
− 1 (Operation on a base clock with a frequency of 16 times
− 1 (Operation on a base clock with a frequency of 8 times
− 1 (Operation on a base clock with a frequency of 16 times
− 1 (Operation on a base clock with a frequency of 8 times
R/W
6
1
the bit rate)
the bit rate)
the bit rate)
the bit rate)
R/W
5
1
R/W
4
1
R/W
3
1
R/W
2
1
R/W
1
1
R/W
0
1
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