R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 777

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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• Clock synchronous mode:
B:
N:
Pφ:
n:
Table 15.3 SCSMR Settings
The bit rate error in asynchronous mode is given by the following formula:
n
0
1
2
3
N =
Bit rate (bits/s)
SCBRR setting for baud rate generator (0 ≤ N ≤ 255)
(The setting must satisfy the electrical characteristics.)
Operating frequency for peripheral modules (MHz)
Baud rate generator clock source (n = 0, 1, 2, 3) (for the clock sources and values of n,
see table 15.3.)
When baud rate generator operates in normal mode (the BGDM bit of SCEMR is 0):
When baud rate generator operates in double speed mode (the BGDM bit of SCEMR is 1):
Error (%) =
Error (%) =
Error (%) =
Error (%) =
8 × 2
2n-1
× B
(N + 1) × B × 64 × 2
(N + 1) × B × 32× 2
(N + 1) × B × 32× 2
(N + 1) × B × 16× 2
Clock Source
Pφ/4
Pφ/16
Pφ/64
× 10
Pφ × 10
Pφ × 10
Pφ × 10
Pφ × 10
6
− 1
6
6
6
6
2n-1
2n-1
2n-1
2n-1
Section 15 Serial Communication Interface with FIFO (SCIF)
− 1
− 1
− 1
− 1
CKS[1]
0
0
1
1
× 100 (Operation on a base clock with a frequency of
× 100 (Operation on a base clock with a frequency of
× 100 (Operation on a base clock with a frequency of
× 100 (Operation on a base clock with a frequency of
16 times the bit rate)
16 times the bit rate)
8 times the bit rate)
8 times the bit rate)
Rev. 3.00 Sep. 28, 2009 Page 745 of 1650
SCSMR Settings
CKS[0]
0
1
0
1
REJ09B0313-0300

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