R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 796
R5S72030W200FP
Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Specifications of R5S72030W200FP
Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Price
Company:
Part Number:
R5S72030W200FP
Manufacturer:
SAMSUNG
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Part Number:
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Manufacturer:
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Section 15 Serial Communication Interface with FIFO (SCIF)
(2)
• The transmission/reception format has a fixed 8-bit data length.
• In receiving, it is possible to detect overrun errors (ORER).
• An internal or external clock can be selected as the SCIF clock source.
Table 15.9 SCSMR Settings and SCIF Communication Formats
[Legend]
x:
Rev. 3.00 Sep. 28, 2009 Page 764 of 1650
REJ09B0313-0300
Bit 7
C/A
0
1
⎯ When an internal clock is selected, the SCIF operates using the clock of the on-chip baud
⎯ When an external clock is selected, the SCIF operates on the input external synchronous
SCSMR Settings
Clock Synchronous Mode
Don't care
rate generator, and outputs this clock to external devices as the synchronous clock.
clock not using the on-chip baud rate generator.
Bit 6
CHR
0
1
x
Bit 5
PE
0
1
0
1
x
Bit 3
STOP Mode
0
1
0
1
0
1
0
1
x
Asynchronous
Clock
synchronous
Data Length
8 bits
7 bits
8 bits
SCIF Communication Format
Parity Bit
Not set
Set
Not set
Set
Not set
Stop Bit Length
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
None
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