R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 827

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

16.3.1
SSCRH specifies master/slave device selection, bidirectional mode enable, SSO pin output value
selection, SSCK pin selection, and SCS pin selection.
Channel Register Name
1
Bit
7
6
Bit Name
MSS
BIDE
SS Control Register H (SSCRH)
SS receive data register 1_1
SS receive data register 2_1
SS receive data register 3_1
Initial value:
Initial
Value
0
0
R/W:
Bit:
MSS
R/W
R/W
R/W
R/W
7
0
BIDE
R/W
6
0
Description
Master/Slave Device Select
Selects that this module is used in master mode or
slave mode. When master mode is selected, transfer
clocks are output from the SSCK pin. When the CE bit
in SSSR is set, this bit is automatically cleared.
0: Slave mode is selected.
1: Master mode is selected.
Bidirectional Mode Enable
Selects that both serial data input pin and output pin are
used or one of them is used. However, transmission
and reception are not performed simultaneously when
bidirectional mode is selected. For details, section
16.4.3, Relationship between Data Input/Output Pins
and Shift Register.
0: Standard mode (two pins are used for data input and
1: Bidirectional mode (one pin is used for data input and
Abbreviation R/W
SSRDR1_1
SSRDR2_1
SSRDR3_1
R
5
0
-
output)
output)
Section 16 Synchronous Serial Communication Unit (SSU)
R/W
SOL
4
0
SOLP
R/W
3
1
R
R
R
Rev. 3.00 Sep. 28, 2009 Page 795 of 1650
R
2
1
-
Initial
value
H'00
H'00
H'00
R/W
1
0
CSS[1:0]
R/W
0
1
Address
H'FFFE780B
H'FFFE780C
H'FFFE780D
REJ09B0313-0300
Access
size
8
8, 16
8