R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 9

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

• Description of Registers
Each register description includes a bit chart, illustrating the arrangement of bits, and a table of
bits, describing the meanings of the bit settings. The standard format and notation for bit charts
and tables are described below.
[Bit Chart]
[Table of Bits]
Initial value:
R/W:
Bit:
Note: The bit names and sentences in the above figure are examples, and have nothing to do with the contents of this
(1) Bit
(2) Bit name
(3) Initial value
(4) R/W
(5) Description
14
Bit
15
13 to 11
10
9
R/W
(1)
15
⎯
0
Indicates the bit number or numbers.
In the case of a 32-bit register, the bits are arranged in order from 31 to 0. In the case
of a 16-bit register, the bits are arranged in order from 15 to 0.
Indicates the name of the bit or bit field.
When the number of bits has to be clearly indicated in the field, appropriate notation is
included (e.g., ASID[3:0]).
A reserved bit is indicated by "−".
Certain kinds of bits, such as those of timer counters, are not assigned bit names. In such
cases, the entry under Bit Name is blank.
Indicates the value of each bit immediately after a power-on reset, i.e., the initial value.
0: The initial value is 0
1: The initial value is 1
−: The initial value is undefined
For each bit and bit field, this entry indicates whether the bit or field is readable or writable,
or both writing to and reading from the bit or field are impossible.
The notation is as follows:
R/W:
R/(W):
R:
W:
Describes the function of the bit or field and specifies the values for writing.
manual.
R/W
14
⎯
0
The bit or field is readable and writable.
The bit or field is readable and writable.
However, writing is only performed to flag clearing.
The bit or field is readable.
"R" is indicated for all reserved bits. When writing to the register, write
the value under Initial Value in the bit chart to reserved bits or fields.
The bit or field is writable.
Bit Name
−
−
ASID2 to
ASID0
−
−
−
ASID2
R/W
(2)
13
0
ASID1 ASID0
R/W
12
0
(3)
Initial Value R/W
0
0
All 0
0
1
0
R/W
11
0
10
⎯
R
0
(4)
R
R
R/W
R
R
⎯
R
9
1
Description
Reserved
These bits are always read as 0.
Address Identifier
These bits enable or disable the pin function.
Reserved
This bit is always read as 0.
Reserved
This bit is always read as 1.
R/W
⎯
8
0
R/W
⎯
7
0
R/W
⎯
6
0
R/W
⎯
5
0
Rev. 3.00 Sep. 28, 2009 Page vii of xxx
(5)
R/W
Q
4
0
ACMP2
R/W
3
0
ACMP1 ACMP0
R/W
2
0
R/W
1
0
REJ09B0313-0300
R/W
IFE
0
0