R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 103
R5S72030W200FP
Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Specifications of R5S72030W200FP
Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5S72030W200FP
Manufacturer:
SAMSUNG
Quantity:
1 001
Company:
Part Number:
R5S72030W200FP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Example
An example is shown using assembler mnemonics, indicating the states before and after execution
of the instruction.
Italics (e.g., .align) indicate an assembler control instruction. The meaning of the assembler
control instructions is given below. For details, refer to the Cross-Assembler User’s Manual.
.org
.data.w
.data.l
.sdata
.align 2
.align 4
.align 32
.arepeat 16
.arepeat 32
.aendr
Note:
SH Series cross-assembler version 1.0 does not support conditional assembler functions.
Location counter setting
Word integer data allocation
Longword integer data allocation
String data allocation
2-byte boundary alignment
4-byte boundary alignment
32-byte boundary alignment
16-times repeat expansion
32-times repeat expansion
Count-specification repeat expansion end
Rev. 3.00 Jul 08, 2005 page 87 of 484
Section 6 Instruction Descriptions
REJ09B0051-0300
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