R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 131

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

6.3.15
No.
1
2
3
4
Description
1. Transfers FRm contents to memory at the address indicated by (disp + Rn).
2. Transfers DRm contents to memory at the address indicated by (disp + Rn).
3. Transfers memory contents at the address indicated by (disp + Rn) to FRn.
4. Transfers memory contents at the address indicated by (disp + Rn) to DRn.
Note
For the Renesas Technology Super H RISC engine assembler, declarations should use scaled
values (×4, ×8) as displacement values.
Operation
void FMOV_INDEX_DISP12_STORE(int
{
}
void FMOV_INDEX_DISP12_STORE_DR(int
{
SZ
0
1
0
1
long disp;
disp = (0x00000FFF & (long)d);
Write_Int ( R[n]+(disp<<2), FR[m]);
PC +=4;
long disp;
disp = (0x00000FFF & (long)d);
FMOV
Floating-Point Transfer
Format
FMOV.S FRm, @(disp12,Rn)
FMOV.D DRm, @(disp12,Rn)
FMOV.S @(disp12,Rm), FRn
FMOV.D @(disp12,Rm), DRn
Floating-point MOVe
Abstract
FRm → (disp×4+Rn)
DRm → (disp×8+Rn)
(disp×4+Rm) → FRn
(disp×8+Rm) → DRn
/*FMOV.D DRm, @(disp12,Rn) */
m,n)
m,n)
Code
0011nnnnmmmm00010011dddddddddddd
0011nnnnmmm000010011dddddddddddd
0011nnnnmmmm00010111dddddddddddd
0011nnn0mmmm00010111dddddddddddd
/*FMOV.S FRm, @(disp12,Rn) */
Rev. 3.00 Jul 08, 2005 page 115 of 484
Section 6 Instruction Descriptions
Floating-Point Instruction
SH-2A/SH2A-FPU (New)
REJ09B0051-0300
Cycle T Bit
1
2
1
2
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