R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 377

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

(1) Execution of a instruction that uses a multiplication result as its source is delayed by an
(2) In the case of an instruction after an instruction that uses the multiplier, if the preceding
MULR R0,R4
ADD
Figure 8.52 Example of Referencing Result Register Immediately after Multiplication (1)
MUL.L R2,R3
STS
Figure 8.53 Example of Referencing Result Register Immediately after Multiplication (2)
MAC.W @R1+,@R2+
MAC.W @R3+,@R4+
Figure 8.54 Example of Referencing Result Register Immediately after Multiplication (3)
MULR1 lock interval
MULR1 R0,R1
MULR2 R0,R2
interval equivalent to the latency of that instruction (figure 8.52). If the following instruction
is one that reads MACH or MACL, execution is delayed by [latency – 1] cycled (figure 8.53).
If the following instruction is a multiply-and-accumulate instruction, execution is not delayed
(figure 8.54).
instruction locked the multiplier, execution is delayed until the multiplier is unlocked (figure
8.55).
However, if the following instruction is a multiply-and-accumulate instruction, it is executed
after waiting for the same kind of state interval as with an ordinary multi-cycle instruction,
rather than after waiting for the multiplier to be unlocked (figure 8.56).
R4,R5
MACH,R4
Figure 8.55 Example of Multiplier Lock Contention
IF
IF
IF
IF
IF
IF
IF
IF
←
← 
←
←
ID
—



ID
—
ID
—
ID
—
→
→
→
→
mm
—
mm
—
mm
—
EX
—
mm
ID
mm
—
mm
ID
MA
ID
mm
mm
mm
—
mm
EX
MA
EX
WB
mm
Rev. 3.00 Jul 08, 2005 page 361 of 484
WB
ID
WB
mm
MA
mm
mm
MA
EX
WB
Section 8 Pipeline Operation
WB
mm
mm
REJ09B0051-0300