LX8584A-33CP Microsemi Analog Mixed Signal Group, LX8584A-33CP Datasheet - Page 5
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LX8584A-33CP
Manufacturer Part Number
LX8584A-33CP
Description
IC REG LDO POS 7A 3.3V TO220
Manufacturer
Microsemi Analog Mixed Signal Group
Datasheet
1.LX8584-00CP.pdf
(9 pages)
Specifications of LX8584A-33CP
Regulator Topology
Positive Fixed
Voltage - Output
3.3V
Voltage - Input
Up to 10V
Number Of Regulators
1
Current - Output
7A (Min)
Operating Temperature
0°C ~ 125°C
Mounting Type
Through Hole
Package / Case
TO-220
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Dropout (typical)
-
Current - Limit (min)
-
Copyright © 1997
Rev. 1.3, 2005-11-11
Overload Recovery (continued)
voltage across the output resistor, the voltage will stabilize at some
lower value, and will never reach the designed value. Under these
circumstances, it may be necessary to cycle the input voltage
down to zero in order to make the regulator output voltage return
to regulation.
RIPPLE REJECTION
between the ADJ pin and ground. The value of the capacitor
should be chosen so that the impedance of the capacitor is equal in
magnitude to the resistance of R
capacitor value can be determined by using this equation:
Where:
At a ripple frequency of 120Hz, with R1 = 100Ω
case; 15μF.
amplitude will be essentially independent of the output voltage. If
an ADJ pin bypass capacitor is not used, output ripple will be
proportional to the ratio of the output voltage to the reference
voltage:
Where
M = 2.5V / 1.25V = 2
were to be bypassed to ground with a properly selected capacitor.
OUTPUT VOLTAGE
between the output and the adjust terminal (See Figure 2). By
placing a resistor, R1, between these two terminals, a constant
current is caused to flow through R1 and down through R2 to set
the overall output voltage. Normally this current is the specified
minimum load current of 10mA. Because I
constant when compared with the current through R
a small error and can usually be ignored.
C
C
M =
If this limited current is not sufficient to develop the designed
Ripple rejection can be improved by connecting a capacitor
The closest equal or larger standard value should be used, in this
When an ADJ pin bypass capacitor is used, output ripple
For example, if V
Output ripple will be twice as bad as it would be if the ADJ pin
The LX8584/84A/84B ICs develop a 1.25V reference voltage
=
=
1/(6.28
1/(6.28
V
OUT
TM
C
F
R
M
V
/V
*
*
R
1
REF
120Hz
REF
F
R
≡
≡
≡
≡
=
*
R
OUT
1
*
the value of the capacitor in Farads; select an
equal or larger standard value.
the ripple frequency in Hz
the value of resistor R1 in ohms
a multiplier for the ripple seen when the ADJ
pin is optimally bypassed.
1.25V.
)
100
= 2.5V the output ripple will be:
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Ω
)
=
13.3µF
1
at the ripple frequency. The
ADJ
is very small and
A P P L I C A T I O N N O T E
Integrated Products Division
1
, it represents
®
Microsemi
LOAD REGULATION
devices, it is not possible to provide true remote load sensing.
Load regulation will be limited by the resistance of the wire
connecting the regulator to the load. The data sheet specification
for load regulation is measured at the bottom of the package.
Negative side sensing is a true Kelvin connection, with the
bottom of the output divider returned to the negative side of the
load. Although it may not be immediately obvious, best load
regulation is obtained when the top of the resistor divider, (R1), is
connected directly to the case of the regulator, not to the load.
This is illustrated in Figure 3. If R
the effective resistance between the regulator and the load would
be:
Where RP
resistance appears as its actual value, rather than the higher R
Figure 3 – Connections for Best Load Regulation
V
V
R
7A Low Dropout Positive Regualtors
Because the LX8584/84A/84B regulators are three-terminal
When the circuit is connected as shown in Figure 3, the parasitic
IN
IN
Peff
V
=
OUT
R
LX8584/84A/84B
IN
P
= V
*
P
Figure 2 – Basic Adjustable Regulator
⎛
⎜
⎝
RODUCTION
R2
REF
ADJ
LX8584/84A/84B
IN
50µA
R1
≡
+
1 +
R1
I
ADJ
OUT
⎞
⎟
⎠
ADJ
R2
R1
actual parasitic line resistance
Line Resistance
D
ATA
+ I
Parasitic
R1
R2
OUT
1
R
ADJ
P
were connected to the load,
Connect
R1 to Case
of Regulator
S
R2
HEET
V
REF
LX8584x-xx
Connect
R2
to Load
R
L
R1
R2
V
OUT
Peff
.
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