MC68908GZ8MFAE Freescale Semiconductor, MC68908GZ8MFAE Datasheet - Page 119

IC MCU 8BIT 8K FLASH 48-LQFP

MC68908GZ8MFAE

Manufacturer Part Number
MC68908GZ8MFAE
Description
IC MCU 8BIT 8K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68908GZ8MFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
M689xx
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
11.3.3 Voltage Hysteresis Protection
Once the LVI has triggered (by having V
V
continually entering and exiting reset if V
V
11.3.4 LVI Trip Selection
The LVI5OR3 bit in the configuration register selects whether the LVI is configured for 5-V or 3-V
protection.
11.4 LVI Status Register
The LVI status register (LVISR) indicates if the V
LVIOUT — LVI Output Bit
11.5 LVI Interrupts
The LVI module does not generate interrupt requests.
Freescale Semiconductor
DD
TRIPF
This read-only flag becomes set when the V
Table
rises above the rising trip point voltage, V
by the hysteresis voltage, V
11-1). Reset clears the LVIOUT bit.
Address:
The microcontroller is guaranteed to operate at a minimum supply voltage.
The trip point (V
Chapter 21 Electrical Specifications
Reset:
Read:
Write:
LVIOUT
$FE0C
Bit 7
0
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
= Unimplemented
Figure 11-3. LVI Status Register (LVISR)
V
TRIPF
TRIPF
6
0
0
V
Table 11-1. LVIOUT Bit Indication
V
HYS
DD
DD
< V
[5 V] or V
V
> V
< V
.
DD
DD
DD
DD
TRIPR
TRIPF
< V
5
0
0
fall below V
is approximately equal to V
TRIPR
TRIPR
TRIPF
DD
DD
NOTE
voltage falls below the V
for the actual trip point voltages.
4
0
0
. This prevents a condition in which the MCU is
voltage was detected below the V
[3 V]) may be lower than this. See
TRIPF
Previous value
), the LVI will maintain a reset condition until
3
0
0
LVIOUT
0
1
2
0
0
TRIPF
TRIPF
. V
1
0
0
TRIPR
trip voltage (see
is greater than
TRIPF
Bit 0
LVI Status Register
0
0
level.
119

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