MC68908GZ8MFAE Freescale Semiconductor, MC68908GZ8MFAE Datasheet - Page 145

• Manufacturer Part Number: MC68908GZ8MFAE
• Description: IC MCU 8BIT 8K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68908GZ8MFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Processor Series: M689xx
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

12.13.4 MSCAN08 Bus Timing Register 1
SAMP — Sampling
TSEG22–TSEG10 — Time Segment
1. In this case PHASE_SEG1 must be at least 2 time quanta.
Freescale Semiconductor
This bit determines the number of serial bus samples to be taken per bit time. If set, three samples per
bit are taken, the regular one (sample point) and two preceding samples, using a majority rule. For
higher bit rates, SAMP should be cleared, which means that only one sample will be taken per bit.
Time segments within the bit time fix the number of clock cycles per bit time and the location of the
sample point. Time segment 1 (TSEG1) and time segment 2 (TSEG2) are programmable as shown in
Table
The bit time is determined by the oscillator frequency, the baud rate prescaler, and the number of time
quanta (T
1 = Three samples per bit
0 = One sample per bit
12-8.
q
) clock cycles per bit as shown in
Address:
The CBTR0 register can be written only if the SFTRES bit in the MSCAN08
module control register is set.
The CBTR1 register can only be written if the SFTRES bit in the MSCAN08
module control register is set.
Reset:
Read:
Write:
BRP5
0
0
0
0
1
:
:
$0503
SAMP
Bit 7
0
Bit time =
Figure 12-19. Bus Timing Register 1 (CBTR1)
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
BRP4
TSEG22
0
0
0
0
1
:
:
(1)
6
0
Table 12-7. Baud Rate Prescaler
f
Pres value
MSCANCLK
BRP3
0
0
0
0
1
TSEG21
:
:
5
0
BRP2
Table
NOTE
NOTE
0
0
0
0
1
TSEG20
• number of time quanta
:
:
4
0
12-4).
BRP1
0
0
1
1
1
TSEG13
:
:
3
0
BRP0
Programmer’s Model of Control Registers
0
1
0
1
1
TSEG12
:
:
2
0
Prescaler
Value (P)
TSEG11
64
1
2
3
4
:
:
1
0
TSEG10
Bit 0
0
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