MC68908GZ8MFAE Freescale Semiconductor, MC68908GZ8MFAE Datasheet - Page 153

• Manufacturer Part Number: MC68908GZ8MFAE
• Description: IC MCU 8BIT 8K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68908GZ8MFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Processor Series: M689xx
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

AC7–AC0 — Acceptance Code Bits
12.13.13 MSCAN08 Identifier Mask Registers (CIDMR0–CIDMR3)
The identifier mask registers specify which of the corresponding bits in the identifier acceptance register
are relevant for acceptance filtering. For standard identifiers it is required to program the last three bits
(AM2–AM0) in the mask register CIDMR1 to ‘don’t care’.
AM7–AM0 — Acceptance Mask Bits
Freescale Semiconductor
AC7–AC0 comprise a user-defined sequence of bits with which the corresponding bits of the related
identifier register (IDRn) of the receive message buffer are compared. The result of this comparison is
then masked with the corresponding identifier mask register.
If a particular bit in this register is cleared, this indicates that the corresponding bit in the identifier
acceptance register must be the same as its identifier bit before a match will be detected. The message
will be accepted if all such bits match. If a bit is set, it indicates that the state of the corresponding bit
in the identifier acceptance register will not affect whether or not the message is accepted.
1 = Ignore corresponding acceptance code register bit.
0 = Match corresponding acceptance code register and identifier bits.
CIDMRO Address: $0514
CIDMR1 Address: $0515
CIDMR2 Address: $0516
CIDMR3 Address: $0517
The CIDAR0–CIDAR3 registers can be written only if the SFTRES bit in
CMCR0 is set
The CIDMR0–CIDMR3 registers can be written only if the SFTRES bit in
the CMCR0 is set
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
AM7
AM7
AM7
AM7
Bit 7
Bit 7
Bit 7
Bit 7
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Figure 12-28. Identifier Mask Registers
AM6
AM6
AM6
AM6
6
6
6
6
AM5
AM5
AM5
AM5
(CIDMR0–CIDMR3)
5
5
5
5
NOTE
NOTE
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
AM4
AM4
AM4
AM4
4
4
4
4
AM3
AM3
AM3
AM3
3
3
3
3
Programmer’s Model of Control Registers
AM2
AM2
AM2
AM2
2
2
2
2
AM1
AM1
AM1
AM1
1
1
1
1
Bit 0
AM0
Bit 0
AM0
Bit 0
AM0
Bit 0
AM0
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