MC68908GZ8MFAE Freescale Semiconductor, MC68908GZ8MFAE Datasheet - Page 41

• Manufacturer Part Number: MC68908GZ8MFAE
• Description: IC MCU 8BIT 8K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68908GZ8MFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Processor Series: M689xx
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2.6.4 FLASH Mass Erase Operation
Use this step-by-step procedure to erase entire FLASH memory to read as logic 1:
2.6.5 FLASH Program/Read Operation
Programming of the FLASH memory is done on a row basis. A row consists of 32 consecutive bytes
starting from addresses $XX00, $XX20, $XX40, $XX60, $XX80, $XXA0, $XXC0, and $XXE0.
During the programming cycle, make sure that all addresses being written to fit within one of the ranges
specified above. Attempts to program addresses in different row ranges in one programming cycle will
fail. Use this step-by-step procedure to program a row of FLASH memory
representation).
1. When in monitor mode, with security sequence failed (see
Freescale Semiconductor
10. After a time, t
of any FLASH address.
1. Set both the ERASE bit, and the MASS bit in the FLASH control register.
2. Read from the FLASH block protect register.
3. Write any data to any FLASH address
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Clear the ERASE and MASS bits.
8. Wait for a time, t
9. Clear the HVEN bit.
1. Set the PGM bit. This configures the memory for program operation and enables the latching of
2. Read from the FLASH block protect register.
3. Write any data to any FLASH address within the row address range desired.
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Write data to the FLASH address to be programmed.
8. Wait for a time, t
9. Repeat step 7 and 8 until all the bytes within the row are programmed.
address and data for programming.
Mass erase is disabled whenever any block is protected (FLBPR does not
equal $FF).
Programming and erasing of FLASH locations cannot be performed by
code being executed from FLASH memory. While these operations must be
performed in the order shown, other unrelated operations may occur
between the steps.
Only bytes which are currently $FF may be programmed.
RCV
NVS
MErase
NVHL
NVS
PGS
PROG
(typical 1 μs), the memory can be accessed in read mode again.
(minimum 10 μs)
(minimum 10 μs).
(minimum 5 μs).
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
(minimum 100 μs)
(minimum 30 μs).
(minimum 4 ms)
(1)
within the FLASH memory address range.
NOTE
NOTE
NOTE
20.3.2
Security), write to the FLASH block protect register instead
(Figure 2-4
FLASH Memory (FLASH)
is a flowchart
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