TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 413
TMPM362F10FG
Manufacturer Part Number
TMPM362F10FG
Description
32BIT MICROCONTROLLER
Manufacturer
Toshiba
Series
TX03r
Datasheet
1.TMPM362F10FG.pdf
(744 pages)
Specifications of TMPM362F10FG
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, Microwire, SIO, SPI, SSP, UART/USART
Peripherals
DMA, WDT
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b
Package / Case
144-LQFP
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Number Of I /o
-
Eeprom Size
-
Oscillator Type
-
Lead Free Status / Rohs Status
Details
Other names
Q5704184A
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TMPM362F10FG
Manufacturer:
Freescale
Quantity:
488
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12.7.2
12.7.2.1
12.7.2.2
cuits in which clocks can be selected by the settings of the baud rates generator and modes.
The serial clock circuit is a block to generate transmit and receive clocks (SIOCLK) and consists of the cir-
rate.
Serial Clock Generation Circuit
(1)
(2)
(1)
The baud rate generator generates transmit and receive clocks to determine the serial channel transfer
A clock can be selected by setting the modes and the register.
Modes can be specified by setting the SCxMOD0<SM>.
The input clock in I/O interface mode is selected by setting SCxCR.
The clock in UART mode is selected by setting SCxMOD0<SC>.
Baud Rate Generator
Clock Selection Circuit
32 and 128.
and SCxBRADD.
mode, either 1/N or N + (16-K)/16 in the UART mode.
The input clock of the baud rate generator is selected from the prescaler outputs divided by 2, 8,
This input clock is selected by setting the SCxBRCR<BRCK>.
The frequency division ratio of the output clock in the baud rate generator is set by SCxBRCR
The following frequency divide ratios can be used; 1/N frequency division in the I/O interface
The table below shows the frequency division ratio which can be selected.
Table 12-7 shows clock selection in I/O interface mode.
Note:1/N (N=1)frequency division ratio can be used only when a double buffer is enabled.
Buad Rate Generator input clock
Baud Rate Generator output clock
Transfer Clock in I/O interface mode
I/O interface
UART
Mode
Divide Function Setting
SCxBRCR<BRADDE>
N + (16-K)/16 division
Divide by N
Divide by N
Page 389
SCxBRCR<BRS>
1 to 16 (Note)
Divide by N
1 to 16
2 to 15
SCxBRADD<BRK>
Divide by K
1 to 15
TMPM362F10FG
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