XR16M2550IL32-F Exar Corporation, XR16M2550IL32-F Datasheet - Page 29

• Manufacturer Part Number: XR16M2550IL32-F
• Description: IC UART FIFO 16B 1.8V DUAL 32QFN
• Manufacturer: Exar Corporation
• Type: Dual UART with 16-byte FIFOsr

Specifications of XR16M2550IL32-F

• Number Of Channels: 2, DUART
• Package / Case: 32-VFQFN Exposed Pad
• Features: *
• Fifo's: 16 Byte
• Voltage - Supply: 2.25 V ~ 3.6 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 16 Mbps
• Supply Voltage (max): 3.63 V
• Supply Voltage (min): 1.62 V
• Supply Current: 0.5 mA to 2 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 45 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.62 V to 3.63 V
• No. Of Channels: 2
• Uart Features: Two Independent UART Channels, Device Identification & Revision
• Supply Voltage Range: 1.62V To 3.63V
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Digital Ic Case Style: QFN
• No. Of Pins: 32
• Filter Terminals: SMD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1285

REV. 1.0.2
LCR[6]: Transmit Break Enable
When enabled, the Break control bit causes a break condition to be transmitted (the TX output is forced to a
“space", LOW state). This condition remains, until disabled by setting LCR bit-6 to a logic 0.
•
•
LCR[7]: Baud Rate Divisors Enable
Baud rate generator divisor (DLL, DLM and DLD) enable.
•
•
The MCR register is used for controlling the serial/modem interface signals or general purpose inputs/outputs.
MCR[0]: DTR# Output
The DTR# pin is a modem control output. If the modem interface is not used, this output may be used as a
general purpose output.
•
•
MCR[1]: RTS# Output
The RTS# pin is a modem control output and may be used for automatic hardware flow control by enabled by
EFR bit-6. If the modem interface is not used, this output may be used as a general purpose output.
•
•
MCR[2]: IrDA RX Inversion or OP1# (legacy term)
When Infrared mode is enabled (MCR[6]=1 and EFR[4]=1), this bit selects the idle state of the encoded IrDA
data. In internal loopback mode, this bit functions like the OP1# in the 16C550.
•
•
In the Internal Loopback Mode, this bit controls the state of the modem input RI# bit in the MSR register as
shown in
4.7
Logic 0 = No TX break condition (default).
Logic 1 = Forces the transmitter output (TX) to a “space”, LOW, for alerting the remote receiver of a line
break condition.
Logic 0 = Data registers are selected (default).
Logic 1 = Divisor latch registers are selected.
Logic 0 = Force DTR# output HIGH (default).
Logic 1 = Force DTR# output LOW.
Logic 0 = Force RTS# HIGH (default).
Logic 1 = Force RTS# LOW.
Logic 0 = Select RX input as active-low encoded IrDA data (Idle state will be low) (default).
Logic 1 = Select RX input as active-high encoded IrDA data (Idle state will be high).
LCR B
X
0
0
1
1
Modem Control Register (MCR) or General Purpose Outputs Control - Read/Write
Figure
IT
-5
12.
LCR B
X
0
1
0
1
IT
-4
HIGH PERFORMANCE LOW VOLTAGE DUART WITH 16-BYTE FIFO
LCR B
T
ABLE
0
1
1
1
1
IT
-3
12: P
ARITY SELECTION
29
Force parity to space, LOW
Force parity to mark, HIGH
P
ARITY SELECTION
Even parity
Odd parity
No parity
XR16M2550