ST16C654DIQ64-F Exar Corporation, ST16C654DIQ64-F Datasheet - Page 16
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ST16C654DIQ64-F
Manufacturer Part Number
ST16C654DIQ64-F
Description
IC UART FIFO 64B QUAD 64LQFP
Manufacturer
Exar Corporation
Datasheet
1.ST16C654CJ68-F.pdf
(51 pages)
Specifications of ST16C654DIQ64-F
Number Of Channels
4, QUART
Package / Case
64-LQFP
Features
*
Fifo's
64 Byte
Protocol
RS232
Voltage - Supply
2.97 V ~ 5.5 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
1.5 Mbps
Supply Current
6 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
No. Of Channels
4
Uart Features
Infrared (IrDA) Encoder/Decoder
Supply Voltage Range
2.97V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1271
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST16C654DIQ64-F
Manufacturer:
Exar
Quantity:
54
Company:
Part Number:
ST16C654DIQ64-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
ST16C654DIQ64-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
ST16C654/654D
2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
Automatic RTS hardware flow control is used to prevent data overrun to the local receiver FIFO. The RTS#
output is used to request remote unit to suspend/resume data transmission. The auto RTS flow control
features is enabled to fit specific application requirement (see
•
•
If needed, the RTS interrupt can be enabled through IER bit-6 (after setting EFR bit-4). The UART issues an
interrupt when the RTS# pin makes a transition from low to high: ISR bit-5 will be set to logic 1.
Automatic CTS flow control is used to prevent data overrun to the remote receiver FIFO. The CTS# input is
monitored to suspend/restart the local transmitter. The auto CTS flow control feature is selected to fit specific
application requirement (see Figure 11):
•
If needed, the CTS interrupt can be enabled through IER bit-7 (after setting EFR bit-4). The UART issues an
interrupt when the CTS# pin is de-asserted (logic 1): ISR bit-5 will be set to 1, and UART will suspend
transmission as soon as the stop bit of the character in process is shifted out. Transmission is resumed after
the CTS# input is re-asserted (logic 0), indicating more data may be sent.
F
2.11
2.12
IGURE
Enable auto RTS flow control using EFR bit-6.
The auto RTS function must be started by asserting RTS# output pin (MCR bit-1 to logic 1 after it is enabled).
Enable auto CTS flow control using EFR bit-7.
Receive Data
Byte and Errors
10. R
Auto RTS Hardware Flow Control
Auto CTS Flow Control
64 bytes by 11-bit
16X Clock
ECEIVER
wide
FIFO
O
PERATION IN
Receive Data Shift
Register (RSR)
Data FIFO
Receive
FIFO
Receive
Data
AND
A
UTO
Validation
Data falls to
Data Bit
Data fills to
Trigger=16
Example
FIFO
- RX FIFO trigger level selected at 16 bytes
56
RTS F
8
16
:
LOW
RTS# re-asserts when data falls below the flow
control trigger level to restart remote transmitter.
Enable by EFR bit-6=1, MCR bit-1.
RTS# de-asserts when data fills above the flow
control trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-1.
Figure
RHR Interrupt (ISR bit-2) programmed for
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
C
ONTROL
11):
M
ODE
Receive Data Characters
xr
RXFIFO1
REV. 5.0.2