SI1002-C-GM Silicon Laboratories Inc, SI1002-C-GM Datasheet - Page 354

IC TXRX MCU + EZRADIOPRO

SI1002-C-GM

Manufacturer Part Number
SI1002-C-GM
Description
IC TXRX MCU + EZRADIOPRO
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI1002-C-GM

Package / Case
42-QFN
Frequency
240MHz ~ 960MHz
Data Rate - Maximum
256kbps
Modulation Or Protocol
FSK, GFSK, OOK
Applications
General Purpose
Power - Output
13dBm
Sensitivity
-121dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
30mA
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 4kB RAM
Antenna Connector
PCB, Surface Mount
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
240 MHz to 960 MHz
Interface Type
UART, SMBus, SPI, PCA
Output Power
13 dBm
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
4.1 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK, GFSK, OOK
Protocol Supported
C2, SMBus
Core
8051
Program Memory Type
Flash
Program Memory Size
64 KB
Data Ram Size
4352 B
Supply Current (max)
4.1 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1878-5
Si1000/1/2/3/4/5
28.2. PCA0 Interrupt Sources
Figure 28.3 shows a diagram of the PCA interrupt tree. There are eight independent event flags that can
be used to generate a PCA0 interrupt. They are: the main PCA counter overflow flag (CF), which is set
upon a 16-bit overflow of the PCA0 counter, an intermediate overflow flag (COVF), which can be set on an
overflow from the 8th, 9th, 10th, or 11th bit of the PCA0 counter, and the individual flags for each PCA
channel (CCF0, CCF1, CCF2, CCF3, CCF4, and CCF5), which are set according to the operation mode of
that module. These event flags are always set when the trigger condition occurs. Each of these flags can
be individually selected to generate a PCA0 interrupt, using the corresponding interrupt enable flag (ECF
for CF, ECOV for COVF, and ECCFn for each CCFn). PCA0 interrupts must be globally enabled before any
individual interrupt sources are recognized by the processor. PCA0 interrupts are globally enabled by set-
ting the EA bit and the EPCA0 bit to logic 1.
354
PCA Counter/Timer 8, 9,
PCA Counter/Timer 16-
10 or 11-bit Overflow
bit Overflow
W
P
M
1
6
n
PCA Module 0
PCA Module 1
PCA Module 2
PCA Module 3
PCA Module 4
PCA Module 5
(for n = 0 to 5)
PCA0CPMn
O
M
E
C
n
C
A
P
P
(CCF0)
(CCF1)
(CCF2)
(CCF3)
(CCF4)
(CCF5)
n
C
A
P
N
n
M
A
T
n
O
G
T
n
W
M
P
n
E
C
C
F
n
C
F
C
R
PCA0CN
C
C
F
5
C
C
F
4
C
C
F
3
Figure 28.3. PCA Interrupt Block Diagram
C
C
F
2
C
C
F
1
C
C
F
0
ECCF0
ECCF1
ECCF2
ECCF3
ECCF4
ECCF5
C
D
L
I
W
D
T
E
PCA0MD
W
D
C
K
L
C
P
S
2
C
P
S
1
0
1
0
1
0
1
0
1
0
1
0
1
C
P
S
0
E
C
F
0
1
Rev. 1.0
A
R
S
E
L
C
O
V
PCA0PWM
F
C
O
E
V
0
1
C
S
E
L
L
1
C
L
S
E
L
0
Set 8, 9, 10, or 11 bit Operation
EPCA0
0
1
EA
0
1
Interrupt
Priority
Decoder

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