AT86RF211SAH-R Atmel, AT86RF211SAH-R Datasheet - Page 47

• Manufacturer Part Number: AT86RF211SAH-R
• Description: IC RF TXRX FSK 400-950MHZ 48TQFP
• Manufacturer: Atmel

Specifications of AT86RF211SAH-R

• Frequency: 400MHz ~ 950MHz
• Data Rate - Maximum: 100kbps
• Modulation Or Protocol: FSK
• Applications: ISM
• Power - Output: 7dBm ~ 12dBm
• Sensitivity: -107dBm
• Voltage - Supply: 2.4 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Memory Size: -
• Current - Transmitting: -
• Current - Receiving: -

Table 2-27.
5348B–WIRE–03/06
Name
PORTPOL
PORTSEL
CLKOUTPUT
NEWDATACLK
SYNCDATAMSG
DATACLKEN
WUSYNC
WUHEAD
–
DTR Detailed Description in RF211S Mode (Continued)
Number of
bits
1
3
2
1
1
1
1
1
3
Comments
DIGOUT pin polarity
0 : low level for '0'
1 : low level for '1', inverted output
reset value : 0
DIGOUT signal selection
000 : divided XTAL reference clock (see CLKOUTPUT below)
001 : carrier Sense on RSSI over TRSSI
010 : XTAL oscillator running flag
011 : 455 kHz reference clock from the discriminator PLL
100 : Receive mode flag during “wake-up mode” (WUEN =1)
101 : Receive mode flag (other modes)
110 : 1 kHz reference clock of the Wake-up timer
111 : Lock Detect flag of the main PLL
reset value : (000)
DIGOUT output clock division ratio
00 : no division
10 : divided by 4 ...... ...... 11 : divided by 8
reset value : (10)
Clock recovery improved algorithm
0 : standard clock recovery state machine, same as AT86RF211 for compatibility
1 : improved clock recovery state machine, recommended
reset value : 0
DATAMSG resynchronization
0 : no resynchronization, as AT86RF211
1 : DATAMSG resynchronized by DATACLK
reset value : 0
DATACLK with RSSI inhibition
0 : no inhibition
reset value : 0
Improved wake-up header synchro detection (during “wake-up mode”)
0 : standard header synchro, as AT86RF211
1 : improved header synchro with wider duty cycle acceptance
reset value : 0
Wake-up header detection
0 : header detection on 9 ½ bits, as AT86RF211
1 : header detection on 10 bits
reset value : 0
Reserved, must be kept to reset value: (000)2
2
2
...... ...... 01 : divided by 2
...... 1: DATACLK inhibited if RSSI < TRSSI
AT86RF211S
47