SI4021-A1-FT Silicon Laboratories Inc, SI4021-A1-FT Datasheet - Page 15

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SI4021-A1-FT

Manufacturer Part Number
SI4021-A1-FT
Description
IC TX FSK 915MHZ 5.4V 16-TSSOP
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI4021-A1-FT

Package / Case
16-TSSOP
Frequency
433MHz, 868MHz, 915MHz
Modulation Or Protocol
FSK, OOK
Data Rate - Maximum
512kbps
Power - Output
8dBm
Current - Transmitting
24mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2.2 V ~ 5.4 V
Operating Temperature
-40°C ~ 85°C
Operating Frequency
433 MHz to 915 MHz
Mounting Style
SMD/SMT
Operating Supply Voltage
2.2 V to 5.4 V
Supply Current
1.5 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Applications
-
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1622-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI4021-A1-FTR
Manufacturer:
SILICON
Quantity:
5 000
3. Frequency Setting Command
Note:
4. Data Rate Command
In EEPROM mode the transmitted bit rate is determined by the 8-bit value R (bits <r7 : r0>) as:
Apart from setting custom values, the standard bit rates from 2.4 to 115.2 kbps can be approximated with minimal error.
The commands are read out with a different fixed bit rate:
Note:
5. Power Setting Command
The bit ook enables the OOK mode for the PA, in this case the data to be transmitted are received through the FSK pin.
bit
bit
bit
The 12-bit parameter of the Frequency Setting Command <f11 :
f0> has the value F. The value F should be in the range of 96 and
3903. When F is out of range, the previous value is kept. The
synthesizer center frequency f
15
15
p2
1
1
7
1
For correct operation of the frequency synthesizer, the frequency and band of operation need to be programmed before the
synthesizer is started. Directly after activation of the synthesizer, the RF VCO is calibrated to ensure proper operation in the
programmed frequency band.
BR = 10 MHz / 29 / (R+1)
F
PLL bandwidth should be set according the data rate. Please see the PLL Setting Command.
0
0
0
0
1
1
1
1
sck
= 10 MHz / 29 / 3 [~115.2 kHz]
p1
14
14
0
1
6
0
0
0
1
1
0
0
1
1
f
0
= 10 MHz * C1 * (C2 + F/4000)
p0
0
1
0
1
0
1
0
1
13
13
1
0
5
1
Relative Output Pow er [dB]
12
12
0
0
4
1
ook
f11
11
11
1
3
0
can be calculated as:
f10
10
10
p2
-12
-15
-18
-21
0
2
-3
-6
-9
0
p1
f9
9
9
0
1
p0
f8
8
8
0
0
r7
f7
7
7
POR
B0h
r6
f6
6
6
The output power is given in the table as relative to the
maximum available power, which depends on the actual
antenna impedance. (See: Antenna Application Note
available from www.silabs.com/integration).
r5
f5
5
5
r4
f4
4
4
The constants C1 and C2 are determined by
the selected band as:
Band [MHz]
r3
f3
3
3
433
868
915
f2
r2
2
2
f1
r1
1
1
C1
1
2
3
f0
r0
0
0
C2
43
43
30
A7D0h
C800h
POR
POR
Si4021
15