AT91SAM7SE256B-AUR Atmel, AT91SAM7SE256B-AUR Datasheet - Page 271
AT91SAM7SE256B-AUR
Manufacturer Part Number
AT91SAM7SE256B-AUR
Description
IC ARM7 MCU FLASH 256K 128-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7SE256-AU.pdf
(673 pages)
Specifications of AT91SAM7SE256B-AUR
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
EBI/EMI, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
88
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
SAM7SE256
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
88
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 85 C
Processor To Be Evaluated
AT91SAM7SE256B
Supply Current (max)
60 uA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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28. Clock Generator
28.1
28.2
28.3
28.3.1
6222F–ATARM–14-Jan-11
Overview
Slow Clock RC Oscillator
Main Oscillator
Main Oscillator Connections
The Clock Generator is made up of 1 PLL, a Main Oscillator, as well as an RC Oscillator.
It provides the following clocks:
The Clock Generator User Interface is embedded within the Power Management Controller and
is described in
The user has to take into account the possible drifts of the RC Oscillator. More details are given
in the section “DC Characteristics” of the product datasheet.
Figure 28-1
Figure 28-1. Main Oscillator Block Diagram
The Clock Generator integrates a Main Oscillator that is designed for a 3 to 20 MHz fundamental
crystal. The typical crystal connection is illustrated in
trical characteristics of the Main Oscillator, see the section “DC Characteristics” of the product
datasheet.
• SLCK, the Slow Clock, which is the only permanent clock within the system
• MAINCK is the output of the Main Oscillator
• PLLCK is the output of the Divider and PLL block
shows the Main Oscillator block diagram.
Section
Slow Clock
XOUT
SLCK
29.9. However, the Clock Generator registers are named CKGR_.
XIN
SAM7SE512/256/32 Preliminary
Main Clock
OSCOUNT
Frequency
Oscillator
MOSCEN
Oscillator
Counter
Counter
Main
Main
Figure
28-2. For further details on the elec-
Main Clock
MAINCK
MAINRDY
MOSCS
MAINF
271
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