AGLN010V2-QNG48 Actel, AGLN010V2-QNG48 Datasheet - Page 135
![FPGA - Field Programmable Gate Array 10K System Gates IGLOO nano](/photos/16/14/161497/qfn-48_sml.jpg)
AGLN010V2-QNG48
Manufacturer Part Number
AGLN010V2-QNG48
Description
FPGA - Field Programmable Gate Array 10K System Gates IGLOO nano
Manufacturer
Actel
Datasheet
1.AGLN030V5-ZUCG81.pdf
(140 pages)
Specifications of AGLN010V2-QNG48
Processor Series
AGLN010
Core
IP Core
Number Of Macrocells
86
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
34
Supply Voltage (max)
1.5 V
Supply Current
3 uA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Development Tools By Supplier
AGLN-Nano-Kit, AGLN-Z-Nano-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FLASHPRO 4, FlashPro 3, FLASHPRO LITE
Mounting Style
SMD/SMT
Supply Voltage (min)
1.2 V
Number Of Gates
10 K
Package / Case
QFN-48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AGLN010V2-QNG48I
Manufacturer:
ACTEL10
Quantity:
4 142
Revision
Revision 10 (cont’d)
Revision 9 (Mar2010)
Product Brief Advance
v0.9
Packaging Advance
v0.8
Revision 8 (Jan 2009)
Product Brief Advance
v0.8
Packaging Advance
v0.7
Revision 7 (Apr 2009)
Product Brief Advance
v0.7
DC and Switching
Characteristics
Advance v0.3
Revision 6 (Mar 2009)
Packaging Advance
v0.6
Revision 5 (Feb 2009)
Packaging Advance
v0.5
Revision 4 (Feb 2009)
Product Brief Advance
v0.6
Revision 3 (Feb 2009)
Product Brief Advance
v0.5
The AGLN250 function for pin C8 in the
22134).
All product tables and pin tables were updated to show clearly that AGLN030 is
available only in the Z feature grade at this time. The nano-Z feature grade
devices are designated with a Z at the end of the part number.
The
(1.5 V systems) and 160 MHz (1.2 V systems) System Performance."
The note for AGLN030 in the
Package"
compatibility with lower density nano devices.
The
hot-swap and cold-sparing.
The
AGLN030 are new.
The
The
The
The
The –F speed grade is no longer offered for IGLOO nano devices and was
removed from the datasheet.
The
The "100-Pin QFN" section was removed.
The QN100 package was removed for all devices.
"IGLOO nano Devices" table
AGLN030 from 81 to 77.
The
The following table note was removed from
(main) and three quadrant global networks are available for AGLN060 and
above."
The CS81 package was added for AGLN250 in the
Available in the Z Feature Grade"
"I/Os with Advanced I/O Standards" section
"81-Pin
"81-Pin CS"
"81-Pin CS"
"81-Pin CS"
"100-Pin VQFP"
"Device Marking" section
"Reprogrammable Flash Technology" section
"81-Pin
table was revised to remove the statement regarding package
CS"pin table for AGLN060 is new.
UC",
and
and
and
"81-Pin
pin table for AGLN030 is new.
"100-Pin VQFP"
"100-Pin VQFP"
"100-Pin VQFP"
CS",
was updated to change the maximum user I/Os for
is new.
R ev i si o n 1 1
"48-Pin
table.
"IGLOO nano Devices"
Changes
pin tables for AGLN060Z are new.
pin tables for AGLN125Z are new.
pin tables for AGLN250Z is new.
QFN", and
"IGLOO nano Devices"
"81-Pin CS"
was revised to add definitions for
was revised to add "250 MHz
"68-Pin QFN"
table was revised (SAR
"IGLOO nano Product
IGLOO nano Low Power Flash FPGAs
table and
table: "Six chip
pin tables for
"I/Os Per
3-5, 3-8,
Page
3-17,
3-10,
3-12,
3-14,
3-13
3-21
3-25
3-27
3-29
3-23
N/A
II,
N/A
N/A
N/A
1-8
3-9
IV
III
II
II
I
II
4 -3