PIC16LF1518-I/MV Microchip Technology, PIC16LF1518-I/MV Datasheet - Page 273
PIC16LF1518-I/MV
Manufacturer Part Number
PIC16LF1518-I/MV
Description
MCU PIC 28KB FLASH 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1517-IPT.pdf
(344 pages)
Specifications of PIC16LF1518-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Processor Series
PIC16LF151x
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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24.2
ADDFSR
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWFC
Syntax:
Operands:
Operation:
Status Affected:
Description:
2010 Microchip Technology Inc.
Instruction Descriptions
Add W and f
[ label ] ADDWF
0 f 127
d 0,1
(W) + (f) (destination)
C, DC, Z
Add the contents of the W register
with register ‘f’. If ‘d’ is ‘0’, the result is
stored in the W register. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
ADD W and CARRY bit to f
[ label ] ADDWFC
0 f 127
d [0,1]
(W) + (f) + (C) dest
C, DC, Z
Add W, the Carry flag and data mem-
ory location ‘f’. If ‘d’ is ‘0’, the result is
placed in W. If ‘d’ is ‘1’, the result is
placed in data memory location ‘f’.
[ label ] ADDFSR FSRn, k
n [ 0, 1]
FSR(n) + k FSR(n)
None
the contents of the FSRnH:FSRnL
register pair.
FSRn is limited to the range 0000h -
FFFFh. Moving beyond these bounds
will cause the FSR to wrap-around.
[ label ] ADDLW
0 k 255
(W) + k (W)
C, DC, Z
The contents of the W register are
added to the eight-bit literal ‘k’ and the
result is placed in the W register.
Add Literal to FSRn
-32 k 31
The signed 6-bit literal ‘k’ is added to
Add literal and W
f,d
k
f {,d}
Preliminary
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ASRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
PIC16(L)F1516/7/8/9
AND W with f
[ label ] ANDWF
0 f 127
d 0,1
(W) .AND. (f) (destination)
Z
AND the W register with register ‘f’. If
‘d’ is ‘0’, the result is stored in the W
register. If ‘d’ is ‘1’, the result is stored
back in register ‘f’.
AND literal with W
[ label ] ANDLW
0 k 255
(W) .AND. (k) (W)
Z
The contents of W register are
AND’ed with the eight-bit literal ‘k’.
The result is placed in the W register.
Arithmetic Right Shift
[ label ] ASRF
0 f 127
d [0,1]
(f<7>) dest<7>
(f<7:1>) dest<6:0>,
(f<0>) C,
C, Z
The contents of register ‘f’ are shifted
one bit to the right through the Carry
flag. The MSb remains unchanged. If
‘d’ is ‘0’, the result is placed in W. If ‘d’
is ‘1’, the result is stored back in reg-
ister ‘f’.
register f
f {,d}
DS41452A-page 273
f,d
k
C
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