ZL6100EVAL1Z Intersil, ZL6100EVAL1Z Datasheet - Page 11

• Manufacturer Part Number: ZL6100EVAL1Z
• Description: EVAL BOARD USB ZL6100
• Manufacturer: Intersil

Specifications of ZL6100EVAL1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The SMBus device address and VOUT_MAX are the only
parameters that must be set by external pins. All other device
parameters can be set via the I
set using the SA0 and SA1 pins. VOUT_MAX is determined as
10% greater than the voltage set by the V0 and V1 pins.
Power Conversion Functional Description
Internal Bias Regulators and Input Supply
Connections
The ZL6100 employs two internal low dropout (LDO)
regulators to supply bias voltages for internal circuitry,
allowing it to operate from a single input supply. The internal
bias regulators are as follows:
• VR:The VR LDO provides a regulated 5V bias supply for
• V25:The V25 LDO provides a regulated 2.5V bias supply
When the input supply (VDD) is higher than 5.5V, the VR pin
should not be connected to any other pins. It should only
have a filter capacitor attached as shown in Figure 7. Due to
the dropout voltage associated with the VR bias regulator,
the VDD pin must be connected to the VR pin for designs
operating from a supply below 5.5V. Figure 7 illustrates the
required connections for both cases.
Note: the internal bias regulators are not designed to be
outputs for powering other circuitry. Do not attach external
loads to any of these pins. The multi-mode pins may be
connected to the V25 pin for logic HIGH settings.
High-side Driver Boost Circuit
The gate drive voltage for the high-side MOSFET driver is
generated by a floating bootstrap capacitor, CB
(see Figure 4). When the lower MOSFET (QL) is turned on,
the SW node is pulled to ground and the capacitor is
charged from the internal VR bias regulator through diode
DB. When QL turns off and the upper MOSFET (QH) turns
on, the SW node is pulled up to V
bootstrap capacitor is boosted approximately 5V above V
to provide the necessary voltage to power the high-side
driver. A Schottky diode should be used for DB to help
maximize the high-side drive supply voltage.
the MOSFET driver circuits. It is powered from the VDD
pin. A 4.7µF filter capacitor is required at the VR pin.
for the main controller circuitry. It is powered from an
internal 5V node. A 10µF filter capacitor is required at the
V25 pin.
3V≤ V
FIGURE 7. INPUT SUPPLY CONNECTIONS
ZL6100
IN
≤ 5.5V
VDD
VR
V
IN
2
11
C/SMBus. The device address is
5.5V< V
DD
ZL6100
and the voltage on the
IN
VDD
≤ 14V
VR
V
IN
DD
ZL6100
Output Voltage Selection
STANDARD MODE
The output voltage may be set to any voltage between 0.6V
and 5.0V provided that the input voltage is higher than the
desired output voltage by an amount sufficient to prevent the
device from exceeding its maximum duty cycle specification.
Using the pin-strap method, V
standard voltages as shown in Table 2.
The resistor setting method can be used to set the output
voltage to levels not available in Table 2. Resistors R0 and
R1 are selected to produce a specific voltage between 0.6V
and 5.0V in 10mV steps. Resistor R1 provides a coarse
setting and resistor R0 provides a fine adjustment, thus
eliminating the additional errors associated with using two
1% resistors (this typically adds ~1.4% error).
To set V
an index value and then use Table 3 to select the resistor that
corresponds to the calculated index value as follows:
1. Calculate Index1:
2. Round the result down to the nearest whole number.
3. Select the value of R1 from Table 3 using the Index1
4. Calculate Index0: Index0 = 100 x V
5. Select the value of R0 from Table 3 using the Index0
V1
rounded value from Step 2.
value from Step 4.
Index1 = 4 x V
TABLE 2. PIN-STRAP OUTPUT VOLTAGE SETTINGS
OUT
LOW
OPEN
HIGH
using resistors, follow the steps below to calculate
OUT
LOW
(V
0.6V
1.2V
2.5V
OUT
OUT
in 10mV steps)
can be set to any of nine
OPEN
0.8V
1.5V
3.3V
V0
OUT
– (25 x Index1)
December 15, 2010
HIGH
1.0V
1.8V
5.0V
FN6876.2