NUTINY-SDK-120 Nuvoton Technology Corporation of America, NUTINY-SDK-120 Datasheet - Page 51

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NUTINY-SDK-120

Manufacturer Part Number
NUTINY-SDK-120
Description
BOARD EVALUATION NUC120 SERIES
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Type
MCUr
Datasheets

Specifications of NUTINY-SDK-120

Contents
Board, Cable
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
NUC120LE3AN, NUC120 Series
5.7.2
5.7.2.1
5.7.2.2
The maximum captured frequency that PWM can capture is confined by the capture interrupt
latency. When capture interrupt occurred, software will do at least three steps, they are: Read
PIIRx to get interrupt source and Read PWM_CRLx/PWM_CFLx(x=0~3) to get capture value and
finally write 1 to clear PIIRx to zero. If interrupt latency will take time T0 to finish, the capture
signal mustn’t transition during this interval (T0). In this case, the maximum capture frequency will
be 1/T0. For example:
HCLK = 50MHz, PWM_CLK = 25MHz, Interrupt latency is 900 ns
So the maximum capture frequency will is 1/900ns ≈ 1000 kHz
Features
PWM function features:
Capture Function Features:
PWM group has two PWM generators. Each PWM generator supports one 8-bit
prescaler, one clock divider, two PWM-timers (down counter), one dead-zone
generator and two PWM outputs.
Up to 16 bits resolution
PWM Interrupt request synchronized with PWM period
One-shot or Auto-reload mode PWM
Up to 2 PWM group (PWMA/PWMB) to support 8 PWM channels or 4 PWM paired
channels (only 1 PWM group support for Low Density)
Timing control logic shared with PWM Generators
Support 8 Capture input channels shared with 8 PWM output channels (Low Density
only support 4 Capture input channels shared with 4 PWM output channels)
Each channel supports one rising latch register (CRLR), one falling latch register
(CFLR) and Capture interrupt flag (CAPIFx)
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NuMicro™ NUC120 Data Sheet
Publication Release Date: Nov 11, 2010
Revision V2.00

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