MCIMX53-START Freescale Semiconductor, MCIMX53-START Datasheet - Page 170
![KIT DEVELOPMENT I.MX53](/photos/39/51/395134/4751369_sml.jpg)
MCIMX53-START
Manufacturer Part Number
MCIMX53-START
Description
KIT DEVELOPMENT I.MX53
Manufacturer
Freescale Semiconductor
Series
i.MX53r
Type
MCUr
Datasheets
1.MCIMX53-START.pdf
(2 pages)
2.MCIMX53-START.pdf
(180 pages)
3.MCIMX53-START.pdf
(204 pages)
Specifications of MCIMX53-START
Contents
Board
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
Cortex - A8
Silicon Core Number
I.MX5
Silicon Family Name
I.MX53
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
i.MX53
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Package Information and Contact Assignments
170
LVDS1_TX3_
N
LVDS1_TX3_P Y12
NANDF_ALE
NANDF_CLE
NANDF_CS0
NANDF_CS1
NANDF_CS2
NANDF_CS3
NANDF_RB0
NANDF_RE_B AC8
NANDF_WE_
B
NANDF_WP_
B
PATA_BUFFE
R_EN
PATA_CS_0
PATA_CS_1
PATA_DA_0
PATA_DA_1
PATA_DA_2
PATA_DATA0
PATA_DATA1
PATA_DATA10 N4
PATA_DATA11 M6
PATA_DATA12 N5
PATA_DATA13 N6
PATA_DATA14 P6
PATA_DATA15 P5
Package Pin
Name
AA12
Y11
AA10
W12
V13
V14
W13
U11
AB8
AC9
K4
L5
L2
K6
L3
L4
L1
M1
Table 112. 19 x 19 mm Signal Assignments, Power Rails, and I/O (continued)
Package
Assign
ment
Pin
i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1
NVCC_LVDS
NVCC_LVDS
NVCC_NANDF
NVCC_NANDF
NVCC_NANDF
NVCC_NANDF
NVCC_NANDF
NVCC_NANDF
NVCC_NANDF
NVCC_EIM_MAIN
NVCC_EIM_MAIN
NVCC_NANDF
NVCC_PATA
NVCC_PATA
NVCC_PATA
NVCC_PATA
NVCC_PATA
NVCC_PATA
NVCC_PATA
NVCC_PATA
NVCC_PATA
NVCC_PATA
NVCC_PATA
NVCC_PATA
NVCC_PATA
NVCC_PATA
Power Rail
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
LVDS
LVDS
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
UHVIO
I/O Buffer
Type
Mode
ALT0
ALT0
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
ALT1
Alt.
GPIO-6 gpio6_GPI[23]
GPIO-6 gpio6_GPI[22]
GPIO-6 gpio6_GPIO[8]
GPIO-6 gpio6_GPIO[7]
GPIO-6 gpio6_GPIO[11]
GPIO-6 gpio6_GPIO[14]
GPIO-6 gpio6_GPIO[15]
GPIO-6 gpio6_GPIO[16]
GPIO-6 gpio6_GPIO[10]
GPIO-6 gpio6_GPIO[13]
GPIO-6 gpio6_GPIO[12]
GPIO-6 gpio6_GPIO[9]
GPIO-7 gpio7_GPIO[1]
GPIO-7 gpio7_GPIO[9]
GPIO-7 gpio7_GPIO[10]
GPIO-7 gpio7_GPIO[6]
GPIO-7 gpio7_GPIO[7]
GPIO-7 gpio7_GPIO[8]
GPIO-2 gpio2_GPIO[0]
GPIO-2 gpio2_GPIO[1]
GPIO-2 gpio2_GPIO[10]
GPIO-2 gpio2_GPIO[11]
GPIO-2 gpio2_GPIO[12]
GPIO-2 gpio2_GPIO[13]
GPIO-2 gpio2_GPIO[14]
GPIO-2 gpio2_GPIO[15]
Out of Reset Condition
Block I/O
Freescale Semiconductor
Directio
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
n
1
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
100 KΩ PU
Config./
Floating
Floating
Value
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