NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 622
NH82801HBM S LB9A
Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet
1.NH82801HBM_S_LB9A.pdf
(890 pages)
Specifications of NH82801HBM S LB9A
Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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15.2.3.2
622
NOTES:
1.
2.
USBPID—USB PIDs Register
Offset:
Default Value:
This Dword register is used to communicate PID information between the USB debug
driver and the USB debug port. The debug port uses some of these fields to generate
USB packets, and uses other fields to return PID information to the USB debug driver.
31:24
23:16
15:8
3:0
Bit
7:0
Bit
5
4
Software should do Read-Modify-Write operations to this register to preserve the contents
of bits not being modified. This include Reserved bits.
To preserve the usage of RESERVED bits in the future, software should always write the
same value read from the bit until it is defined. Reserved bits will always return 0 when
read.
GO_CNT — WO.
0 = Hardware clears this bit when hardware sets the DONE_STS bit. (Default)
1 = Causes hardware to perform a read or write request.
NOTE: Writing a 1 to this bit when it is already set may result in undefined behavior.
WRITE_READ#_CNT — R/W. Software clears this bit to indicate that the current
request is a read. Software sets this bit to indicate that the current request is a write.
0 = Read (Default)
1 = Write
DATA_LEN_CNT — R/W. This field is used to indicate the size of the data to be
transferred. default = 0h.
For write operations, this field is set by software to indicate to the hardware how many
bytes of data in Data Buffer are to be transferred to the console. A value of 0h
indicates that a zero-length packet should be sent. A value of 1–8 indicates 1–8 bytes
are to be transferred. Values 9–Fh are invalid and how hardware behaves if used is
undefined.
For read operations, this field is set by hardware to indicate to software how many
bytes in Data Buffer are valid in response to a read operation. A value of 0h indicates
that a zero length packet was returned and the state of Data Buffer is not defined. A
value of 1–8 indicates 1–8 bytes were received. Hardware is not allowed to return
values 9–Fh.
The transferring of data always starts with byte 0 in the data area and moves toward
byte 7 until the transfer size is reached.
Reserved: These bits will return 0 when read. Writes will have no effect.
RECEIVED_PID_STS[23:16] — RO. Hardware updates this field with the received
PID for transactions in either direction. When the controller is writing data, this field
is updated with the handshake PID that is received from the device. When the host
controller is reading data, this field is updated with the data packet PID (if the device
sent data), or the handshake PID (if the device NAKs the request). This field is valid
when the hardware clears the GO_DONE#_CNT bit.
SEND_PID_CNT[15:8] — R/W. Hardware sends this PID to begin the data packet
when sending data to USB (i.e., WRITE_READ#_CNT is asserted). Software typically
sets this field to either DATA0 or DATA1 PID values.
TOKEN_PID_CNT[7:0] — R/W. Hardware sends this PID as the Token PID for each
USB transaction. Software typically sets this field to either IN, OUT, or SETUP PID
values.
MEM_BASE + A4h
0000h
Description
Description
Attribute:
Size:
EHCI Controller Registers (D29:F7, D26:F7)
R/W, RO
32 bits
Intel
®
ICH8 Family Datasheet
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