NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 761
NH82801HBM S LB9A
Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet
1.NH82801HBM_S_LB9A.pdf
(890 pages)
Specifications of NH82801HBM S LB9A
Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Serial Peripheral Interface (SPI)
20.1.22
Note:
20.1.23
Note:
Intel
®
ICH8 Family Datasheet
FDOC—Flash Descriptor Observability Control Register
(
Memory Address:SPIBAR + B0h
Default Value:
This register that can be used to observe the contents of the Flash Descriptor that is
stored in the ICH8 Flash Controller.
FDOD—Flash Descriptor Observability Data Register
(
Memory Address:SPIBAR + B4h
Default Value:
This register that can be used to observe the contents of the Flash Descriptor that is
stored in the ICH8 Flash Controller.
31:15
14:12
SPI Memory Mapped Configuration Registers
SPI Memory Mapped Configuration Registers
11:2
31:0
1:0
Bit
Bit
Reserved
Flash Descriptor Section Select (FDSS): — R/W. This field selects which section
within the loaded Flash Descriptor to observe.
000 = Flash Signature and Descriptor Map
001 = Component
010 = Region
011 = Master
100 = ICH8 Soft Straps
111 = Reserved
Flash Descriptor Section Index (FDSI): — R/W. This field selects the DW offset
within the Flash Descriptor Section to observe.
Reserved
Flash Descriptor Section Data (FDSD): — RO. This field returns the DW of data to
observe as selected in the Flash Descriptor Observability Control.
00000000h
00000000h
Description
Description
Attribute:
Size:
Attribute:
Size:
)
)
R/W
32 bits
RO
32 bits
761
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