PIC12F1822-I/MF Microchip Technology, PIC12F1822-I/MF Datasheet - Page 197
PIC12F1822-I/MF
Manufacturer Part Number
PIC12F1822-I/MF
Description
IC, 8BIT MCU, PIC12, 32MHZ, DFN-8
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Datasheets
1.PIC12F1822T-ISN.pdf
(404 pages)
2.PIC12F1822T-ISN.pdf
(10 pages)
3.PIC12F1822-IMF.pdf
(398 pages)
Specifications of PIC12F1822-I/MF
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
256Byte
Ram Memory Size
128Byte
Cpu Speed
32MHz
No. Of Timers
3
Core Size
8 Bit
Program Memory Size
3.5KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12F1822-I/MF
Manufacturer:
ALLEGRO
Quantity:
1 001
Part Number:
PIC12F1822-I/MF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 197 of 398
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REGISTER 22-4:
TABLE 22-1:
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
Name
MDCARH
MDCARL
MDCON
MDSRC
Legend:
MDCLODIS
R/W-x/u
Narrowed carrier pulse widths or spurs may occur in the signal stream if the carrier is not synchronized.
MDMSODIS
— = unimplemented, read as ‘0’. Shaded cells are not used in the Data Signal Modulator mode.
MDCHODIS
MDCLODIS
MDEN
Bit 7
MDCLODIS: Modulator Low Carrier Output Disable bit
1 = Output signal driving the peripheral output pin (selected by MDCL<3:0> of the MDCARL register)
0 = Output signal driving the peripheral output pin (selected by MDCL<3:0> of the MDCARL register)
MDCLPOL: Modulator Low Carrier Polarity Select bit
1 = Selected low carrier signal is inverted
0 = Selected low carrier signal is not inverted
MDCLSYNC: Modulator Low Carrier Synchronization Enable bit
1 = Modulator waits for a falling edge on the low time carrier signal before allowing a switch to the high
0 = Modulator Output is not synchronized to the low time carrier signal
Unimplemented: Read as ‘0’
MDCL<3:0> Modulator Data High Carrier Selection bits
1111 = Reserved. No channel connected.
0101 = Reserved. No channel connected.
0100 = CCP1 output (PWM Output mode only)
0011 = Reference Clock module signal
0010 = Reserved. No channel connected.
0001 = MDCIN1 port pin
0000 = V
MDCLPOL
SUMMARY OF REGISTERS ASSOCIATED WITH DATA SIGNAL MODULATOR MODE
R/W-x/u
is disabled
is enabled
time carrier
•
•
•
MDCARL: MODULATION LOW CARRIER CONTROL REGISTER
MDCHPOL
MDCLPOL
SS
MDOE
Bit 6
—
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
MDCLSYNC
R/W-x/u
MDCHSYNC
MDCLSYNC
MDSLR
Bit 5
—
PIC12F/LF1822/16F/LF1823
U-0
Preliminary
—
MDOPOL
Bit 4
—
—
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-x/u
MDOUT
Bit 3
(1)
Bit 2
R/W-x/u
—
MDCH<3:0>
MDMS<3:0>
MDCL<3:0>
MDCL<3:0>
(1)
Bit 1
—
R/W-x/u
MDBIT
DS41413A-page 197
Bit 0
R/W-x/u
Register
on Page
196
197
194
195
bit 0
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