UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 525
UPD78F0535GB(T)-UEU-A
Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0535GB(T)-UEU-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
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21.2.2 STOP mode
(1) STOP mode setting and operating statuses
The STOP mode is set by executing the STOP instruction, and it can be set only when the CPU clock before the
setting was the main system clock.
Caution Because the interrupt request signal is used to clear the standby mode, if there is an interrupt
The operating statuses in the STOP mode are shown below.
source with the interrupt request flag set and the interrupt mask flag reset, the standby mode is
immediately cleared if set. Thus, the STOP mode is reset to the HALT mode immediately after
execution of the STOP instruction and the system returns to the operating mode as soon as the
wait time set using the oscillation stabilization time select register (OSTS) has elapsed.
×: don’t care
Maskable interrupt
request
Reset
Table 21-2. Operation in Response to Interrupt Request in HALT Mode
Release Source
CHAPTER 21 STANDBY FUNCTION
MK××
User’s Manual U17260EJ6V0UD
0
0
0
0
0
1
−
PR××
0
0
1
1
1
×
−
IE
0
1
0
×
1
×
×
ISP
×
×
1
0
1
×
×
Next address
instruction execution
Interrupt servicing
execution
Next address
instruction execution
Interrupt servicing
execution
HALT mode held
Reset processing
Operation
525
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