DSPIC30F2020T-30I/SO Microchip Technology, DSPIC30F2020T-30I/SO Datasheet - Page 13
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
DSPIC30F2020T-30I/SO
Manufacturer Part Number
DSPIC30F2020T-30I/SO
Description
12KB, Flash, 512bytes-RAM, 30MIPS, 21I/O, 16-bit Family,nanoWatt 28 SOIC .300in
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.AC164335.pdf
(286 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F1010-30ISO.pdf
(26 pages)
4.DSPIC30F1010-30ISO.pdf
(50 pages)
Specifications of DSPIC30F2020T-30I/SO
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F2020T-30I/SOTR
28. Module: UART
29. Module: UART
© 2010 Microchip Technology Inc.
The auto-baud feature may not calculate the
correct baud rate when the High Baud Rate
Enable bit, BRGH, is set. With BRGH set, the baud
rate calculation used is the same as BRG = 0.
Work around
If the auto-baud feature is needed, use the Low
Baud Rate mode by clearing the BRGH bit.
Affected Silicon Revisions
With the auto-baud feature selected, the Sync
Break character (0x55) may be loaded into the
FIFO as data.
Work around
To prevent the Sync Break character from being
loaded into the FIFO, load the UxBRG register with
either 0x0000 or 0xFFFF prior to enabling the
auto-baud feature (ABAUD = 1).
Affected Silicon Revisions
A1
A1
X
X
A2
A2
X
X
A3
A3
X
X
30. Module: UART
TABLE 4:
31. Module: UART
Idle State = 1
Idle State = 0
Type of Signal
Transmission
dsPIC30F1010/202X
Used for
The UART module can be used to transmit and
receive IrDA
transceiver, by setting the IREN bit in the UxMODE
register. In this mode, the operation of the RXINV
bit enables reception of signals with an Idle state
of either ‘1’ or ‘0’. The operation of this bit is the
inverse
“dsPIC30F1010/202X Data Sheet” (DS70178).
The signal received from an IrDA transceiver can
have an Idle state of ‘1’ or ‘0’. The following table
summarizes how UART receptions will occur when
used with the IrDA decoder.
Work around
Invert the state of RXINV bit in the UxMODE
register.
If the Idle state of the received signal is ‘1’,
configure RXINV = 1. If the Idle state of the
received signal is ‘0’, configure RXINV = 0.
Affected Silicon Revisions
The auto-baud feature may miscalculate for
certain baud rate and clock speed combinations,
resulting in a BRG value that is greater than or less
than the expected value by 1. This may result in
reception or transmission failures.
Work around
Test the auto-baud rate at various clock speed and
baud rate combinations that would be used in an
application. If an inaccurate BRG value is
generated, manually correct the baud rate in the
user software.
Affected Silicon Revisions
A1
A1
X
X
A2
A2
X
X
of
®
A3
A3
the
X
X
signals, with the use of an IrDA
RXINV = 0
RXINV = 1
RXINV = 0
RXINV = 1
RXINV bit
State of
stated
operation
May be erroneous
Error free
Error free
May be erroneous
UART reception
DS80445D-page 13
in
the