PIC18F4420-E/PT Microchip Technology, PIC18F4420-E/PT Datasheet - Page 7
![44 PIN, 16 KB ENH FLASH, 3804 RAM, 36 I/O, PB FREE,](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F4420-E/PT
Manufacturer Part Number
PIC18F4420-E/PT
Description
44 PIN, 16 KB ENH FLASH, 3804 RAM, 36 I/O, PB FREE,
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2420-IML.pdf
(412 pages)
3.PIC18F2420-IML.pdf
(16 pages)
4.PIC18F2420-IML.pdf
(8 pages)
5.PIC18F2420-IML.pdf
(6 pages)
6.PIC18F2420-IML.pdf
(8 pages)
7.PIC18F2420-IML.pdf
(4 pages)
Specifications of PIC18F4420-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4420-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
23. Module: Interrupts
EXAMPLE 2:
© 2008 Microchip Technology Inc.
ISR @ 0x0008
Foo:
CALL
POP
:
:
RETFIE
If an interrupt occurs during a two-cycle instruction
that modifies the STATUS, BSR or WREG register,
the unmodified value of the register will be saved
to the corresponding Fast Return (Shadow)
register and upon a fast return from the interrupt,
the unmodified value will be restored to the
STATUS, BSR or WREG register.
For example, if a high priority interrupt occurs
during the instruction, MOVFF TEMP, WREG, the
MOVFF instruction will be completed and WREG
will be loaded with the value of TEMP before
branching to ISR. However, the previous value of
WREG will be saved to the Fast Return register
during ISR branching. Upon return from the
interrupt with a fast return, the previous value of
WREG in the Fast Return register will be written to
WREG. This results in WREG containing the value
it had before execution of MOVFF TEMP, WREG.
Affected instructions are:
MOVFF Fs, Fd
where Fd is WREG, BSR or STATUS;
MOVSF Zs, Fd
where Fd is WREG, BSR or STATUS; and
MOVSS [Zs], [Zd]
where the destination is WREG, BSR or STATUS.
Foo, FAST
FAST
; store current value of WREG, BSR, STATUS for a second time
; clears return address of Foo call
; insert high priority ISR code here
PIC18F2420/2520/4420/4520
Work around
1. Assembly Language Programming:
a) If any two-cycle instruction is used to modify
b) As another alternative, the following work
the WREG, BSR or STATUS register, do not
use the RETFIE FAST instruction to return
from the interrupt. Instead, save/restore
WREG, BSR and STATUS via software per
Example 9-1 in the Device Data Sheet. Alter-
natively, in the case of MOVFF, use the MOVF
instruction to write to WREG instead. For
example, use:
MOVF
MOVWF
instead of: MOVFF TEMP, BSR.
around shown in Example 2 can be used.
This example overwrites the Fast Return
register by making a dummy call to Foo with
the fast option in the high priority service
routine.
TEMP, W
BSR
DS80209H-page 7